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authorbonzini <bonzini@138bc75d-0d04-0410-961f-82ee72b054a4>2009-04-07 12:26:23 +0000
committerbonzini <bonzini@138bc75d-0d04-0410-961f-82ee72b054a4>2009-04-07 12:26:23 +0000
commita5f5a6f73e89b0804d978362a4f9784f829480ce (patch)
tree914800b7eea5389951113beed1ebb3595432ea04 /gcc/config/i386
parente367688037dcb9dbdd9540ad83743685f92849f3 (diff)
downloadgcc-a5f5a6f73e89b0804d978362a4f9784f829480ce.tar.gz
2009-04-07 Paolo Bonzini <bonzini@gnu.org>
* config/i386/i386.c (ix86_compare_emitted): Remove. (ix86_expand_compare, ix86_expand_branch): Handle MODE_CC ix86_compare_op0 like ix86_compare_emitted used to be handled. * config/i386/i386.h (ix86_compare_emitted): Remove. * config/i386/i386.md (stack_protect_test): Set ix86_compare_op0 instead of ix86_compare_emitted. * config/i386/sync.md (sync_compare_and_swap_cc): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@145665 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386')
-rw-r--r--gcc/config/i386/i386.c21
-rw-r--r--gcc/config/i386/i386.h1
-rw-r--r--gcc/config/i386/i386.md6
-rw-r--r--gcc/config/i386/sync.md5
4 files changed, 13 insertions, 20 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ea9d35efade..d87e853265f 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1702,7 +1702,6 @@ int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER] =
rtx ix86_compare_op0 = NULL_RTX;
rtx ix86_compare_op1 = NULL_RTX;
-rtx ix86_compare_emitted = NULL_RTX;
/* Define parameter passing and return registers. */
@@ -14271,11 +14270,9 @@ ix86_expand_compare (enum rtx_code code, rtx *second_test, rtx *bypass_test)
if (bypass_test)
*bypass_test = NULL_RTX;
- if (ix86_compare_emitted)
- {
- ret = gen_rtx_fmt_ee (code, VOIDmode, ix86_compare_emitted, const0_rtx);
- ix86_compare_emitted = NULL_RTX;
- }
+ if (GET_MODE_CLASS (GET_MODE (ix86_compare_op0)) == MODE_CC)
+ ret = gen_rtx_fmt_ee (code, VOIDmode, ix86_compare_op0, ix86_compare_op1);
+
else if (SCALAR_FLOAT_MODE_P (GET_MODE (op0)))
{
gcc_assert (!DECIMAL_FLOAT_MODE_P (GET_MODE (op0)));
@@ -14304,12 +14301,6 @@ ix86_expand_branch (enum rtx_code code, rtx label)
{
rtx tmp;
- /* If we have emitted a compare insn, go straight to simple.
- ix86_expand_compare won't emit anything if ix86_compare_emitted
- is non NULL. */
- if (ix86_compare_emitted)
- goto simple;
-
switch (GET_MODE (ix86_compare_op0))
{
case QImode:
@@ -14510,7 +14501,11 @@ ix86_expand_branch (enum rtx_code code, rtx label)
}
default:
- gcc_unreachable ();
+ /* If we have already emitted a compare insn, go straight to simple.
+ ix86_expand_compare won't emit anything if ix86_compare_emitted
+ is non NULL. */
+ gcc_assert (GET_MODE_CLASS (GET_MODE (ix86_compare_op0)) == MODE_CC);
+ goto simple;
}
}
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 9746e158f5a..1f87d10571b 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2333,7 +2333,6 @@ extern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER];
extern rtx ix86_compare_op0; /* operand 0 for comparisons */
extern rtx ix86_compare_op1; /* operand 1 for comparisons */
-extern rtx ix86_compare_emitted;
/* To properly truncate FP values into integers, we need to set i387 control
word. We can't emit proper mode switching code before reload, as spills
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 02a4f6ec8b8..b388cd16bfb 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -21954,9 +21954,6 @@
""
{
rtx flags = gen_rtx_REG (CCZmode, FLAGS_REG);
- ix86_compare_op0 = operands[0];
- ix86_compare_op1 = operands[1];
- ix86_compare_emitted = flags;
#ifdef TARGET_THREAD_SSP_OFFSET
if (TARGET_64BIT)
@@ -21971,6 +21968,9 @@
else
emit_insn (gen_stack_protect_test_si (flags, operands[0], operands[1]));
#endif
+
+ ix86_compare_op0 = flags;
+ ix86_compare_op1 = const0_rtx;
emit_jump_insn (gen_beq (operands[2]));
DONE;
})
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index 05aad00ba94..7f92c14b3c5 100644
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -168,9 +168,8 @@
"TARGET_CMPXCHG"
{
operands[4] = gen_rtx_REG (CCZmode, FLAGS_REG);
- ix86_compare_op0 = operands[3];
- ix86_compare_op1 = NULL;
- ix86_compare_emitted = operands[4];
+ ix86_compare_op0 = operands[4];
+ ix86_compare_op1 = const0_rtx;
if ((<MODE>mode == DImode && !TARGET_64BIT) || <MODE>mode == TImode)
{
enum machine_mode hmode = <MODE>mode == DImode ? SImode : DImode;