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author | dberlin <dberlin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-06-11 18:02:15 +0000 |
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committer | dberlin <dberlin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-06-11 18:02:15 +0000 |
commit | 3072d30e7983a3ca5ad030f1f98a5c39bcc2c07b (patch) | |
tree | fdb9e9f8a0700a2713dc690fed1a2cf20dae8392 /gcc/config/i386 | |
parent | 8ceb1bfd33bc40bf0cbe1fab8903c2c31efd10ee (diff) | |
download | gcc-3072d30e7983a3ca5ad030f1f98a5c39bcc2c07b.tar.gz |
Merge dataflow branch into mainline
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125624 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386')
-rw-r--r-- | gcc/config/i386/i386.c | 41 | ||||
-rw-r--r-- | gcc/config/i386/i386.h | 2 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 23 |
3 files changed, 35 insertions, 31 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index f8019bde0f9..61a24eedade 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -49,6 +49,7 @@ Boston, MA 02110-1301, USA. */ #include "cgraph.h" #include "tree-gimple.h" #include "dwarf2.h" +#include "df.h" #include "tm-constrs.h" #include "params.h" @@ -3014,7 +3015,7 @@ ix86_eax_live_at_start_p (void) to correct at this point. This gives false positives for broken functions that might use uninitialized data that happens to be allocated in eax, but who cares? */ - return REGNO_REG_SET_P (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end, 0); + return REGNO_REG_SET_P (DF_LIVE_OUT (ENTRY_BLOCK_PTR), 0); } /* Return true if TYPE has a variable argument list. */ @@ -5580,7 +5581,7 @@ ix86_select_alt_pic_regnum (void) { int i; for (i = 2; i >= 0; --i) - if (!regs_ever_live[i]) + if (!df_regs_ever_live_p (i)) return i; } @@ -5593,7 +5594,7 @@ ix86_save_reg (unsigned int regno, int maybe_eh_return) { if (pic_offset_table_rtx && regno == REAL_PIC_OFFSET_TABLE_REGNUM - && (regs_ever_live[REAL_PIC_OFFSET_TABLE_REGNUM] + && (df_regs_ever_live_p (REAL_PIC_OFFSET_TABLE_REGNUM) || current_function_profile || current_function_calls_eh_return || current_function_uses_const_pool)) @@ -5620,7 +5621,7 @@ ix86_save_reg (unsigned int regno, int maybe_eh_return) && regno == REGNO (cfun->machine->force_align_arg_pointer)) return 1; - return (regs_ever_live[regno] + return (df_regs_ever_live_p (regno) && !call_used_regs[regno] && !fixed_regs[regno] && (regno != HARD_FRAME_POINTER_REGNUM || !frame_pointer_needed)); @@ -6106,13 +6107,13 @@ ix86_expand_prologue (void) pic_reg_used = false; if (pic_offset_table_rtx - && (regs_ever_live[REAL_PIC_OFFSET_TABLE_REGNUM] + && (df_regs_ever_live_p (REAL_PIC_OFFSET_TABLE_REGNUM) || current_function_profile)) { unsigned int alt_pic_reg_used = ix86_select_alt_pic_regnum (); if (alt_pic_reg_used != INVALID_REGNUM) - REGNO (pic_offset_table_rtx) = alt_pic_reg_used; + SET_REGNO (pic_offset_table_rtx, alt_pic_reg_used); pic_reg_used = true; } @@ -6130,9 +6131,7 @@ ix86_expand_prologue (void) LABEL_PRESERVE_P (label) = 1; gcc_assert (REGNO (pic_offset_table_rtx) != REGNO (tmp_reg)); insn = emit_insn (gen_set_rip_rex64 (pic_offset_table_rtx, label)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); insn = emit_insn (gen_set_got_offset_rex64 (tmp_reg, label)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); insn = emit_insn (gen_adddi3 (pic_offset_table_rtx, pic_offset_table_rtx, tmp_reg)); } @@ -6141,20 +6140,16 @@ ix86_expand_prologue (void) } else insn = emit_insn (gen_set_got (pic_offset_table_rtx)); - - /* Even with accurate pre-reload life analysis, we can wind up - deleting all references to the pic register after reload. - Consider if cross-jumping unifies two sides of a branch - controlled by a comparison vs the only read from a global. - In which case, allow the set_got to be deleted, though we're - too late to do anything about the ebx save in the prologue. */ - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); } /* Prevent function calls from be scheduled before the call to mcount. In the pic_reg_used case, make sure that the got load isn't deleted. */ if (current_function_profile) - emit_insn (gen_blockage (pic_reg_used ? pic_offset_table_rtx : const0_rtx)); + { + if (pic_reg_used) + emit_insn (gen_prologue_use (pic_offset_table_rtx)); + emit_insn (gen_blockage ()); + } } /* Emit code to restore saved registers using MOV insns. First register @@ -6366,7 +6361,7 @@ ix86_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED, HOST_WIDE_INT size ATTRIBUTE_UNUSED) { if (pic_offset_table_rtx) - REGNO (pic_offset_table_rtx) = REAL_PIC_OFFSET_TABLE_REGNUM; + SET_REGNO (pic_offset_table_rtx, REAL_PIC_OFFSET_TABLE_REGNUM); #if TARGET_MACHO /* Mach-O doesn't support labels at the end of objects, so if it looks like we might want one, insert a NOP. */ @@ -7193,7 +7188,7 @@ legitimize_pic_address (rtx orig, rtx reg) base address (@GOTOFF). */ if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); if (GET_CODE (addr) == CONST) addr = XEXP (addr, 0); if (GET_CODE (addr) == PLUS) @@ -7225,7 +7220,7 @@ legitimize_pic_address (rtx orig, rtx reg) base address (@GOTOFF). */ if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); if (GET_CODE (addr) == CONST) addr = XEXP (addr, 0); if (GET_CODE (addr) == PLUS) @@ -7276,7 +7271,7 @@ legitimize_pic_address (rtx orig, rtx reg) Global Offset Table (@GOT). */ if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT); new_rtx = gen_rtx_CONST (Pmode, new_rtx); if (TARGET_64BIT) @@ -7329,7 +7324,7 @@ legitimize_pic_address (rtx orig, rtx reg) if (!TARGET_64BIT) { if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0), UNSPEC_GOTOFF); new_rtx = gen_rtx_PLUS (Pmode, new_rtx, op1); @@ -7489,7 +7484,7 @@ legitimize_tls_address (rtx x, enum tls_model model, int for_mov) else if (flag_pic) { if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); pic = pic_offset_table_rtx; type = TARGET_ANY_GNU_TLS ? UNSPEC_GOTNTPOFF : UNSPEC_GOTTPOFF; } diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 693f8ee2df7..5089883dca5 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2431,7 +2431,7 @@ struct machine_function GTY(()) verify whether there's any such instruction live by testing that REG_SP is live. */ #define ix86_current_function_calls_tls_descriptor \ - (ix86_tls_descriptor_calls_expanded_in_cfun && regs_ever_live[SP_REG]) + (ix86_tls_descriptor_calls_expanded_in_cfun && df_regs_ever_live_p (SP_REG)) /* Control behavior of x86_file_start. */ #define X86_FILE_START_VERSION_DIRECTIVE false diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 905e1c19c1a..0ecb9961d85 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -194,6 +194,7 @@ (UNSPECV_CMPXCHG_2 11) (UNSPECV_XCHG 12) (UNSPECV_LOCK 13) + (UNSPECV_PROLOGUE_USE 14) ]) ;; Registers by name. @@ -1917,7 +1918,7 @@ [(set (match_operand:DI 0 "push_operand" "") (match_operand:DI 1 "immediate_operand" ""))] "TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed) + ? epilogue_completed : reload_completed) && !symbolic_operand (operands[1], DImode) && !x86_64_immediate_operand (operands[1], DImode)" [(set (match_dup 0) (match_dup 1)) @@ -2153,7 +2154,7 @@ [(set (match_operand:DI 0 "memory_operand" "") (match_operand:DI 1 "immediate_operand" ""))] "TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed) + ? epilogue_completed : reload_completed) && !symbolic_operand (operands[1], DImode) && !x86_64_immediate_operand (operands[1], DImode)" [(set (match_dup 2) (match_dup 3)) @@ -10573,7 +10574,7 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed)" + ? epilogue_completed : reload_completed)" [(const_int 0)] "ix86_split_ashl (operands, NULL_RTX, DImode); DONE;") @@ -11504,7 +11505,7 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed)" + ? epilogue_completed : reload_completed)" [(const_int 0)] "ix86_split_ashr (operands, NULL_RTX, DImode); DONE;") @@ -12182,7 +12183,7 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed)" + ? epilogue_completed : reload_completed)" [(const_int 0)] "ix86_split_lshr (operands, NULL_RTX, DImode); DONE;") @@ -14347,7 +14348,7 @@ registers we stored in the result block. We avoid problems by claiming that all hard registers are used and clobbered at this point. */ - emit_insn (gen_blockage (const0_rtx)); + emit_insn (gen_blockage ()); DONE; }) @@ -14358,7 +14359,15 @@ ;; all of memory. This blocks insns from being moved across this point. (define_insn "blockage" - [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_BLOCKAGE)] + [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] + "" + "" + [(set_attr "length" "0")]) + +;; As USE insns aren't meaningful after reload, this is used instead +;; to prevent deleting instructions setting registers for PIC code +(define_insn "prologue_use" + [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_PROLOGUE_USE)] "" "" [(set_attr "length" "0")]) |