* doc/md.texi (Iterators): Renamed from Macros. All contents

	changed to reflect rename of respectively define_code_macro and
	define_mode_macro to define_code_iterator and define_mode_iterator.
	(Mode Iterators, Code Iterators): Similar.
	* read-rtl.c (struct iterator_group, struct iterator_traverse_data)
	(uses_mode_iterator_p, apply_mode_iterator, uses_code_iterator_p)
	(apply_iterator_to_string, uses_iterator_p, apply_iterator_traverse)
	(initialize_iterators, find_iterator, check_code_iterator)
	(map_attr_string, apply_mode_maps, apply_iterator_to_rtx, add_mapping)
	(read_mapping, read_rtx_1): Similar.
	* config/alpha/sync.md, config/alpha/alpha.md, config/frv/frv.md,
	config/s390/s390.md, config/m32c/blkmov.md, config/m32c/m32c.md,
	config/spu/spu.md, config/sparc/sparc.md, config/sparc/sync.md,
	config/i386/i386.md, config/i386/mmx.md, config/i386/sse.md,
	config/i386/sync.md, config/crx/crx.md, config/xtensa/xtensa.md,
	config/cris/cris.c, config/cris/cris.md, config/ia64/sync.md,
	config/ia64/div.md, config/ia64/vect.md, config/ia64/ia64.md,
	config/m68k/m68k.md, config/rs6000/spe.md, config/rs6000/altivec.md,
	config/rs6000/sync.md, config/rs6000/rs6000.md,
	config/arm/vec-common.md, config/arm/neon.md, config/arm/iwmmxt.md,
	config/arm/arm.md, config/mips/mips-dsp.md, config/mips/mips.md,
	config/vax/vax.md, config/bfin/bfin.md: Similar.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127715 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 24 insertions, 24 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 751d46b9ac6..609e6d6dda7 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -488,7 +488,7 @@
   [(set_attr "length" "128")
    (set_attr "type" "multi")])
 
-(define_code_macro plusminus [plus minus])
+(define_code_iterator plusminus [plus minus])
 
 ;; Base name for define_insn and insn mnemonic.
 (define_code_attr addsub [(plus "add") (minus "sub")])
@@ -497,7 +497,7 @@
 (define_code_attr comm [(plus "%") (minus "")])
 
 ;; All single word integer modes.
-(define_mode_macro SWI [QI HI SI (DI "TARGET_64BIT")])
+(define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")])
 
 ;; Instruction suffix for integer modes.
 (define_mode_attr imodesuffix [(QI "b") (HI "w") (SI "l") (DI "q")])
@@ -516,22 +516,22 @@
 	 (DI "x86_64_general_operand")])
 
 ;; All x87 floating point modes
-(define_mode_macro X87MODEF [SF DF XF])
+(define_mode_iterator X87MODEF [SF DF XF])
 
 ;; x87 SFmode and DFMode floating point modes
-(define_mode_macro X87MODEF12 [SF DF])
+(define_mode_iterator X87MODEF12 [SF DF])
 
 ;; All integer modes handled by x87 fisttp operator.
-(define_mode_macro X87MODEI [HI SI DI])
+(define_mode_iterator X87MODEI [HI SI DI])
 
 ;; All integer modes handled by integer x87 operators.
-(define_mode_macro X87MODEI12 [HI SI])
+(define_mode_iterator X87MODEI12 [HI SI])
 
 ;; All SSE floating point modes
-(define_mode_macro SSEMODEF [SF DF])
+(define_mode_iterator SSEMODEF [SF DF])
 
 ;; All integer modes handled by SSE cvtts?2si* operators.
-(define_mode_macro SSEMODEI24 [SI DI])
+(define_mode_iterator SSEMODEI24 [SI DI])
 
 ;; SSE asm suffix for floating point modes
 (define_mode_attr ssemodefsuffix [(SF "s") (DF "d")])
@@ -10085,7 +10085,7 @@
 
 ;; Copysign instructions
 
-(define_mode_macro CSGNMODE [SF DF TF])
+(define_mode_iterator CSGNMODE [SF DF TF])
 (define_mode_attr CSGNVMODE [(SF "V4SF") (DF "V2DF") (TF "TF")])
 
 (define_expand "copysign<mode>3"
@@ -21009,7 +21009,7 @@
   }
   [(set_attr "type" "multi")])
 
-(define_mode_macro CRC32MODE [QI HI SI])
+(define_mode_iterator CRC32MODE [QI HI SI])
 (define_mode_attr crc32modesuffix [(QI "b") (HI "w") (SI "l")])
 (define_mode_attr crc32modeconstraint [(QI "qm") (HI "rm") (SI "rm")])
 
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 6268d8fa16c..70073de9278 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -31,14 +31,14 @@
 ;; direction of the user via a builtin.
 
 ;; 8 byte integral modes handled by MMX (and by extension, SSE)
-(define_mode_macro MMXMODEI [V8QI V4HI V2SI])
+(define_mode_iterator MMXMODEI [V8QI V4HI V2SI])
 
 ;; All 8-byte vector modes handled by MMX
-(define_mode_macro MMXMODE [V8QI V4HI V2SI V2SF])
+(define_mode_iterator MMXMODE [V8QI V4HI V2SI V2SF])
 
 ;; Mix-n-match
-(define_mode_macro MMXMODE12 [V8QI V4HI])
-(define_mode_macro MMXMODE24 [V4HI V2SI])
+(define_mode_iterator MMXMODE12 [V8QI V4HI])
+(define_mode_iterator MMXMODE24 [V4HI V2SI])
 
 ;; Mapping from integer vector mode to mnemonic suffix
 (define_mode_attr mmxvecsize [(V8QI "b") (V4HI "w") (V2SI "d") (DI "q")])
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 72048ad6653..31fd293e7b6 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -21,17 +21,17 @@
 
 ;; 16 byte integral modes handled by SSE, minus TImode, which gets
 ;; special-cased for TARGET_64BIT.
-(define_mode_macro SSEMODEI [V16QI V8HI V4SI V2DI])
+(define_mode_iterator SSEMODEI [V16QI V8HI V4SI V2DI])
 
 ;; All 16-byte vector modes handled by SSE
-(define_mode_macro SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF])
+(define_mode_iterator SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF])
 
 ;; Mix-n-match
-(define_mode_macro SSEMODE12 [V16QI V8HI])
-(define_mode_macro SSEMODE24 [V8HI V4SI])
-(define_mode_macro SSEMODE14 [V16QI V4SI])
-(define_mode_macro SSEMODE124 [V16QI V8HI V4SI])
-(define_mode_macro SSEMODE248 [V8HI V4SI V2DI])
+(define_mode_iterator SSEMODE12 [V16QI V8HI])
+(define_mode_iterator SSEMODE24 [V8HI V4SI])
+(define_mode_iterator SSEMODE14 [V16QI V4SI])
+(define_mode_iterator SSEMODE124 [V16QI V8HI V4SI])
+(define_mode_iterator SSEMODE248 [V8HI V4SI V2DI])
 
 ;; Mapping from integer vector mode to mnemonic suffix
 (define_mode_attr ssevecsize [(V16QI "b") (V8HI "w") (V4SI "d") (V2DI "q")])
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index 7282381c040..7530ab53358 100644
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -18,14 +18,14 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_mode_macro IMODE [QI HI SI (DI "TARGET_64BIT")])
+(define_mode_iterator IMODE [QI HI SI (DI "TARGET_64BIT")])
 (define_mode_attr modesuffix [(QI "b") (HI "w") (SI "l") (DI "q")])
 (define_mode_attr modeconstraint [(QI "q") (HI "r") (SI "r") (DI "r")])
 (define_mode_attr immconstraint [(QI "i") (HI "i") (SI "i") (DI "e")])
 
-(define_mode_macro CASMODE [QI HI SI (DI "TARGET_64BIT || TARGET_CMPXCHG8B")
+(define_mode_iterator CASMODE [QI HI SI (DI "TARGET_64BIT || TARGET_CMPXCHG8B")
 			   (TI "TARGET_64BIT && TARGET_CMPXCHG16B")])
-(define_mode_macro DCASMODE
+(define_mode_iterator DCASMODE
   [(DI "!TARGET_64BIT && TARGET_CMPXCHG8B && !flag_pic")
    (TI "TARGET_64BIT && TARGET_CMPXCHG16B")])
 (define_mode_attr doublemodesuffix [(DI "8") (TI "16")])