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author | wilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4> | 2000-10-23 23:38:39 +0000 |
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committer | wilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4> | 2000-10-23 23:38:39 +0000 |
commit | 836ac237fd1a9e2fdcfc53fdbd27806a240eb00e (patch) | |
tree | 7ed58bf400ab78ca07272eed4b6918aec3518e15 /gcc/config/ia64/ia64.md | |
parent | 733aa0af97895552360323a25d7ea5aa8857094c (diff) | |
download | gcc-836ac237fd1a9e2fdcfc53fdbd27806a240eb00e.tar.gz |
Fix Turbo's LPRng compilation failure due to assembler errors.
* ia64.c (ia64_print_operand, case 'r'): Correct comment. Handle
CONST_INT.
* ia64.md (cmpsi_adjusted): Use %r3.
(cmpdi_adjusted): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@37025 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ia64/ia64.md')
-rw-r--r-- | gcc/config/ia64/ia64.md | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 022161b8654..cf6fdd2aec9 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -4200,13 +4200,16 @@ "cmp4.%C1 %0, %I0 = %3, %2" [(set_attr "type" "A")]) +;; We use %r3 because it is possible for us to match a 0, and two of the +;; unsigned comparisons don't accept immediate operands of zero. + (define_insn "*cmpsi_adjusted" [(set (match_operand:BI 0 "register_operand" "=c") (match_operator:BI 1 "adjusted_comparison_operator" [(match_operand:SI 2 "gr_register_operand" "r") (match_operand:SI 3 "gr_reg_or_8bit_adjusted_operand" "rL")]))] "" - "cmp4.%C1 %0, %I0 = %3, %2" + "cmp4.%C1 %0, %I0 = %r3, %2" [(set_attr "type" "A")]) (define_insn "*cmpdi_normal" @@ -4218,13 +4221,16 @@ "cmp.%C1 %0, %I0 = %3, %r2" [(set_attr "type" "A")]) +;; We use %r3 because it is possible for us to match a 0, and two of the +;; unsigned comparisons don't accept immediate operands of zero. + (define_insn "*cmpdi_adjusted" [(set (match_operand:BI 0 "register_operand" "=c") (match_operator:BI 1 "adjusted_comparison_operator" [(match_operand:DI 2 "gr_register_operand" "r") (match_operand:DI 3 "gr_reg_or_8bit_adjusted_operand" "rL")]))] "" - "cmp.%C1 %0, %I0 = %3, %2" + "cmp.%C1 %0, %I0 = %r3, %2" [(set_attr "type" "A")]) (define_insn "*cmpsf_internal" |