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author | sje <sje@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-02-07 21:06:42 +0000 |
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committer | sje <sje@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-02-07 21:06:42 +0000 |
commit | ce519b06319c6a396f39df1157bfdcd979c93bca (patch) | |
tree | cb8b245a386cd3819eb76943116f441829e1776b /gcc/config/ia64/vect.md | |
parent | dc9a6d82a6f0fbffe3607e04674b94cfb04c4fce (diff) | |
download | gcc-ce519b06319c6a396f39df1157bfdcd979c93bca.tar.gz |
2011-02-07 Steve Ellcey <sje@cup.hp.com>
PR target/46997
* vect.md (vec_interleave_highv2sf): Change fmix for TARGET_BIG_ENDIAN.
(vec_interleave_lowv2sf): Ditto.
(vec_extract_evenv2sf): Add TARGET_BIG_ENDIAN check.
(vec_extract_oddv2sf): Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@169904 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ia64/vect.md')
-rw-r--r-- | gcc/config/ia64/vect.md | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/gcc/config/ia64/vect.md b/gcc/config/ia64/vect.md index ad367214d9d..1684c8092c2 100644 --- a/gcc/config/ia64/vect.md +++ b/gcc/config/ia64/vect.md @@ -1490,7 +1490,7 @@ { /* Recall that vector elements are numbered in memory order. */ if (TARGET_BIG_ENDIAN) - return "%,fmix.r %0 = %F1, %F2"; + return "%,fmix.l %0 = %F1, %F2"; else return "%,fmix.l %0 = %F2, %F1"; } @@ -1507,7 +1507,7 @@ { /* Recall that vector elements are numbered in memory order. */ if (TARGET_BIG_ENDIAN) - return "%,fmix.l %0 = %F1, %F2"; + return "%,fmix.r %0 = %F1, %F2"; else return "%,fmix.r %0 = %F2, %F1"; } @@ -1534,10 +1534,14 @@ [(match_operand:V2SF 0 "gr_register_operand" "") (match_operand:V2SF 1 "gr_register_operand" "") (match_operand:V2SF 2 "gr_register_operand" "")] - "!TARGET_BIG_ENDIAN" + "" { - emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1], - operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1], + operands[2])); + else + emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1], + operands[2])); DONE; }) @@ -1545,10 +1549,14 @@ [(match_operand:V2SF 0 "gr_register_operand" "") (match_operand:V2SF 1 "gr_register_operand" "") (match_operand:V2SF 2 "gr_register_operand" "")] - "!TARGET_BIG_ENDIAN" + "" { - emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1], - operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1], + operands[2])); + else + emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1], + operands[2])); DONE; }) |