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authorkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2005-04-03 00:38:00 +0000
committerkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2005-04-03 00:38:00 +0000
commit94c41a53c50b57fd5bf5282f9db1ba764c0b320f (patch)
tree56956a494a485994e83505db4338da698e567b72 /gcc/config/iq2000/iq2000.c
parentd5f35d570793f0f9cca259c7cd9f46cc760a8743 (diff)
downloadgcc-94c41a53c50b57fd5bf5282f9db1ba764c0b320f.tar.gz
* config/iq2000/iq2000.c (uns_arith_operand, arith_operand,
small_int, large_int, reg_or_0_operand, simple_memory_operand, equality_op, cmp_op, pc_or_label_operand, call_insn_operand, move_operand, power_of_2_operand): Move to predicates.md. * config/iq2000/iq2000.h (SPECIAL_MODE_PREDICATES, PREDICATE_CODE): Remove. * config/iq2000/iq2000.md: Include predicates.md. * config/iq2000/predicates.md: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97472 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/iq2000/iq2000.c')
-rw-r--r--gcc/config/iq2000/iq2000.c211
1 files changed, 0 insertions, 211 deletions
diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c
index b9fa16ac461..ff3fc0d6545 100644
--- a/gcc/config/iq2000/iq2000.c
+++ b/gcc/config/iq2000/iq2000.c
@@ -208,217 +208,6 @@ static int iq2000_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
struct gcc_target targetm = TARGET_INITIALIZER;
-/* Return 1 if OP can be used as an operand where a register or 16 bit unsigned
- integer is needed. */
-
-int
-uns_arith_operand (rtx op, enum machine_mode mode)
-{
- if (GET_CODE (op) == CONST_INT && SMALL_INT_UNSIGNED (op))
- return 1;
-
- return register_operand (op, mode);
-}
-
-/* Return 1 if OP can be used as an operand where a 16 bit integer is needed. */
-
-int
-arith_operand (rtx op, enum machine_mode mode)
-{
- if (GET_CODE (op) == CONST_INT && SMALL_INT (op))
- return 1;
-
- return register_operand (op, mode);
-}
-
-/* Return 1 if OP is a integer which fits in 16 bits. */
-
-int
-small_int (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return (GET_CODE (op) == CONST_INT && SMALL_INT (op));
-}
-
-/* Return 1 if OP is a 32 bit integer which is too big to be loaded with one
- instruction. */
-
-int
-large_int (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- HOST_WIDE_INT value;
-
- if (GET_CODE (op) != CONST_INT)
- return 0;
-
- value = INTVAL (op);
-
- /* IOR reg,$r0,value. */
- if ((value & ~ ((HOST_WIDE_INT) 0x0000ffff)) == 0)
- return 0;
-
- /* SUBU reg,$r0,value. */
- if (((unsigned HOST_WIDE_INT) (value + 32768)) <= 32767)
- return 0;
-
- /* LUI reg,value >> 16. */
- if ((value & 0x0000ffff) == 0)
- return 0;
-
- return 1;
-}
-
-/* Return 1 if OP is a register or the constant 0. */
-
-int
-reg_or_0_operand (rtx op, enum machine_mode mode)
-{
- switch (GET_CODE (op))
- {
- case CONST_INT:
- return INTVAL (op) == 0;
-
- case CONST_DOUBLE:
- return op == CONST0_RTX (mode);
-
- case REG:
- case SUBREG:
- return register_operand (op, mode);
-
- default:
- break;
- }
-
- return 0;
-}
-
-/* Return 1 if OP is a memory operand that fits in a single instruction
- (i.e., register + small offset). */
-
-int
-simple_memory_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- rtx addr, plus0, plus1;
-
- /* Eliminate non-memory operations. */
- if (GET_CODE (op) != MEM)
- return 0;
-
- /* Dword operations really put out 2 instructions, so eliminate them. */
- if (GET_MODE_SIZE (GET_MODE (op)) > (unsigned) UNITS_PER_WORD)
- return 0;
-
- /* Decode the address now. */
- addr = XEXP (op, 0);
- switch (GET_CODE (addr))
- {
- case REG:
- case LO_SUM:
- return 1;
-
- case CONST_INT:
- return SMALL_INT (addr);
-
- case PLUS:
- plus0 = XEXP (addr, 0);
- plus1 = XEXP (addr, 1);
- if (GET_CODE (plus0) == REG
- && GET_CODE (plus1) == CONST_INT && SMALL_INT (plus1)
- && SMALL_INT_UNSIGNED (plus1) /* No negative offsets. */)
- return 1;
-
- else if (GET_CODE (plus1) == REG
- && GET_CODE (plus0) == CONST_INT && SMALL_INT (plus0)
- && SMALL_INT_UNSIGNED (plus1) /* No negative offsets. */)
- return 1;
-
- else
- return 0;
-
- case SYMBOL_REF:
- return 0;
-
- default:
- break;
- }
-
- return 0;
-}
-
-/* Return nonzero if the code of this rtx pattern is EQ or NE. */
-
-int
-equality_op (rtx op, enum machine_mode mode)
-{
- if (mode != GET_MODE (op))
- return 0;
-
- return GET_CODE (op) == EQ || GET_CODE (op) == NE;
-}
-
-/* Return nonzero if the code is a relational operations (EQ, LE, etc). */
-
-int
-cmp_op (rtx op, enum machine_mode mode)
-{
- if (mode != GET_MODE (op))
- return 0;
-
- return COMPARISON_P (op);
-}
-
-/* Return nonzero if the operand is either the PC or a label_ref. */
-
-int
-pc_or_label_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- if (op == pc_rtx)
- return 1;
-
- if (GET_CODE (op) == LABEL_REF)
- return 1;
-
- return 0;
-}
-
-/* Return nonzero if OP is a valid operand for a call instruction. */
-
-int
-call_insn_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return (CONSTANT_ADDRESS_P (op)
- || (GET_CODE (op) == REG && op != arg_pointer_rtx
- && ! (REGNO (op) >= FIRST_PSEUDO_REGISTER
- && REGNO (op) <= LAST_VIRTUAL_REGISTER)));
-}
-
-/* Return nonzero if OP is valid as a source operand for a move instruction. */
-
-int
-move_operand (rtx op, enum machine_mode mode)
-{
- /* Accept any general operand after reload has started; doing so
- avoids losing if reload does an in-place replacement of a register
- with a SYMBOL_REF or CONST. */
- return (general_operand (op, mode)
- && (! (iq2000_check_split (op, mode))
- || reload_in_progress || reload_completed));
-}
-
-/* Return nonzero if OP is a constant power of 2. */
-
-int
-power_of_2_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- int intval;
-
- if (GET_CODE (op) != CONST_INT)
- return 0;
- else
- intval = INTVAL (op);
-
- return ((intval & ((unsigned)(intval) - 1)) == 0);
-}
-
/* Return nonzero if we split the address into high and low parts. */
int