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authorjsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>2010-12-14 00:26:29 +0000
committerjsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>2010-12-14 00:26:29 +0000
commit3a0201c8aa1e081d359ec547e33a13e2b32e3518 (patch)
treee9c778c4b2b963b3fc2a67fcbc4fd93860960b49 /gcc/config/m32c
parentbc6adae4807d19065feeac1effb2199f7b8740a3 (diff)
downloadgcc-3a0201c8aa1e081d359ec547e33a13e2b32e3518.tar.gz
* config/m32c/m32c.h (ENDFILE_SPEC, LINK_SPEC, SIZE_TYPE,
PTRDIFF_TYPE, WCHAR_TYPE, WCHAR_TYPE_SIZE): Define. * config.gcc (m32c-*-rtems*, m32c-*-elf*): Don't use svr4.h. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167780 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32c')
-rw-r--r--gcc/config/m32c/m32c.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h
index f72260d668d..a953ee33a3e 100644
--- a/gcc/config/m32c/m32c.h
+++ b/gcc/config/m32c/m32c.h
@@ -27,6 +27,13 @@
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "crt0.o%s crtbegin.o%s"
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
+
+#undef LINK_SPEC
+#define LINK_SPEC "%{h*} %{v:-V} \
+ %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
+
/* There are four CPU series we support, but they basically break down
into two families - the R8C/M16C families, with 16-bit address
registers and one set of opcodes, and the M32CM/M32C group, with
@@ -190,6 +197,18 @@ machine_function;
#undef UINTPTR_TYPE
#define UINTPTR_TYPE (TARGET_A16 ? "unsigned int" : "long unsigned int")
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "long int"
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
/* REGISTER USAGE */
/* Register Basics */