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| author | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-11-10 19:37:20 +0000 |
|---|---|---|
| committer | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-11-10 19:37:20 +0000 |
| commit | b34423598600c34d80b9947dde7e450205dcef30 (patch) | |
| tree | fc77333c8328550fd03b66f40c0eb66ca526c51c /gcc/config/m32c | |
| parent | f7ca552b7b168654fe7167d93b70dfe839cbb4e8 (diff) | |
| download | gcc-b34423598600c34d80b9947dde7e450205dcef30.tar.gz | |
* config/m32c/m32c.c (m32c_const_ok_for_constraint_p): Add ImB
constraint for single-bit-clear in lower byte of HI constant, vs
Imb which just ignores the upper byte.
* config/m32c/predicates.md (m32c_1mask8_operand): Use it.
* config/m32c/bitops.md (andhi3_16, andhi3_24): Use it.
(iorhi3_16): Check for single bit set, not single bit clear.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@141747 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32c')
| -rw-r--r-- | gcc/config/m32c/bitops.md | 6 | ||||
| -rw-r--r-- | gcc/config/m32c/m32c.c | 5 | ||||
| -rw-r--r-- | gcc/config/m32c/predicates.md | 2 |
3 files changed, 9 insertions, 4 deletions
diff --git a/gcc/config/m32c/bitops.md b/gcc/config/m32c/bitops.md index 966e680640f..d92494ac3ef 100644 --- a/gcc/config/m32c/bitops.md +++ b/gcc/config/m32c/bitops.md @@ -98,7 +98,7 @@ (define_insn "andhi3_16" [(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,??Rmm,RhiSd,??Rmm") (and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0") - (match_operand:HI 2 "mrai_operand" "Imb,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))] + (match_operand:HI 2 "mrai_operand" "ImB,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))] "TARGET_A16" "@ @@ -159,7 +159,7 @@ (define_insn "iorhi3_16" [(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,RhiSd,??Rmm,??Rmm") (ior:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0") - (match_operand:HI 2 "mrai_operand" "Imb,Imw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))] + (match_operand:HI 2 "mrai_operand" "Ilb,Ilw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))] "TARGET_A16" "@ bset %B2,%0 @@ -192,7 +192,7 @@ (define_insn "andhi3_24" [(set (match_operand:HI 0 "mra_operand" "=Sd,Sd,Rqi,Rqi,RhiSd,??Rmm,RhiSd,??Rmm") (and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0,0") - (match_operand:HI 2 "mrai_operand" "Imb,Imw,Imb,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))] + (match_operand:HI 2 "mrai_operand" "ImB,Imw,ImB,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))] "TARGET_A24" "@ bclr\t%B2,%0 diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index 3fda87bcf0f..d2260c86075 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -949,6 +949,11 @@ m32c_const_ok_for_constraint_p (HOST_WIDE_INT value, int b = exact_log2 ((value ^ 0xff) & 0xff); return (b >= 0 && b <= 7); } + if (memcmp (str, "ImB", 3) == 0) + { + int b = exact_log2 ((value ^ 0xffff) & 0xffff); + return (b >= 0 && b <= 7); + } if (memcmp (str, "Ilw", 3) == 0) { int b = exact_log2 (value); diff --git a/gcc/config/m32c/predicates.md b/gcc/config/m32c/predicates.md index 5d1b8428497..1a2ff4b4fe8 100644 --- a/gcc/config/m32c/predicates.md +++ b/gcc/config/m32c/predicates.md @@ -284,7 +284,7 @@ (define_predicate "m32c_1mask8_operand" (and (match_operand 0 "const_int_operand") - (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Imb\")"))) + (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"ImB\")"))) (define_predicate "m32c_1mask16_operand" (and (match_operand 0 "const_int_operand") |