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authorkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2007-02-04 04:11:52 +0000
committerkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2007-02-04 04:11:52 +0000
commitc910419dffff2133d4f4e28dfe6312bcf13e825e (patch)
treeff5c96fd74ddbd915ef3a28100ba32c1e32246dc /gcc/config/m32r/m32r.c
parente1db7b202fcfc7de631a70a429a74865b45d925f (diff)
downloadgcc-c910419dffff2133d4f4e28dfe6312bcf13e825e.tar.gz
* config/m32c/bitops.md, config/m32c/jump.md,
config/m32c/m32c.c, config/m32c/m32c.h, config/m32r/m32r.c, config/m32r/m32r.h, config/m32r/m32r.md, config/m32r/predicates.md, config/m68hc11/larith.asm, config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h, config/m68k/m68k.h, config/mcore/mcore.md, config/mips/4k.md, config/mips/mips-protos.h, config/mips/mips.c, config/mips/mips.h, config/mips/mips.md, config/mips/mips16.S, config/mn10300/mn10300.h, config/mn10300/predicates.md, config/mt/mt.c, config/mt/mt.h, config/mt/mt.md: Follow spelling conventions. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@121565 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32r/m32r.c')
-rw-r--r--gcc/config/m32r/m32r.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 9b288f319a1..6c9f3e54d62 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -215,7 +215,7 @@ m32r_init (void)
indexed by hard register number, and one indexed by mode. */
/* The purpose of m32r_mode_class is to shrink the range of modes so that
- they all fit (as bit numbers) in a 32 bit word (again). Each real mode is
+ they all fit (as bit numbers) in a 32-bit word (again). Each real mode is
mapped into one m32r_mode_class mode. */
enum m32r_mode_class
@@ -515,7 +515,7 @@ small_data_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
return 0;
}
-/* Return 1 if OP is a symbol that can use 24 bit addressing. */
+/* Return 1 if OP is a symbol that can use 24-bit addressing. */
int
addr24_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
@@ -550,7 +550,7 @@ addr24_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
return 0;
}
-/* Return 1 if OP is a symbol that needs 32 bit addressing. */
+/* Return 1 if OP is a symbol that needs 32-bit addressing. */
int
addr32_operand (rtx op, enum machine_mode mode)
@@ -602,7 +602,7 @@ easy_di_const (rtx op)
split_double (op, &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
- /* Pick constants loadable with 2 16 bit `ldi' insns. */
+ /* Pick constants loadable with 2 16-bit `ldi' insns. */
if (high >= -128 && high <= 127
&& low >= -128 && low <= 127)
return 1;
@@ -1852,7 +1852,7 @@ m32r_print_operand (FILE * file, rtx x, int code)
Bottom halves. For symbols output arguments to a seth/add3 pair to
set Top and Bottom halves. The difference exists because for
constants seth/or3 is more readable but for symbols we need to use
- the same scheme as `ld' and `st' insns (16 bit addend is signed). */
+ the same scheme as `ld' and `st' insns (16-bit addend is signed). */
switch (GET_CODE (x))
{
case CONST_INT :
@@ -2181,7 +2181,7 @@ static void
block_move_call (rtx dest_reg, rtx src_reg, rtx bytes_rtx)
{
/* We want to pass the size as Pmode, which will normally be SImode
- but will be DImode if we are using 64 bit longs and pointers. */
+ but will be DImode if we are using 64-bit longs and pointers. */
if (GET_MODE (bytes_rtx) != VOIDmode
&& GET_MODE (bytes_rtx) != Pmode)
bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1);