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author | nickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-05-24 07:45:24 +0000 |
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committer | nickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-05-24 07:45:24 +0000 |
commit | 9ca439fa004dda7518a6869a6f0de64b6e8addd5 (patch) | |
tree | aa8ed62f6fd0c8570038b5f7bb692f58f03067f2 /gcc/config/m32r/m32r.c | |
parent | 2229953bc36f1548e627afbd5c218c4e8f7feff3 (diff) | |
download | gcc-9ca439fa004dda7518a6869a6f0de64b6e8addd5.tar.gz |
* config/m32r/m32r.c (m32r_expand_block_move): Return 0 if nothing was done.
* config/m32r/m32r.md (movmemsi): If m32r_expand_block_move did nothing then FAIL.
* config/m32r/m32r/m32r-protos.h (m32r_expand_block_move): Update prototype.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100095 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32r/m32r.c')
-rw-r--r-- | gcc/config/m32r/m32r.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index fbe539433f5..6e082032176 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -2201,9 +2201,11 @@ block_move_call (rtx dest_reg, rtx src_reg, rtx bytes_rtx) operands[0] is the pointer to the destination. operands[1] is the pointer to the source. operands[2] is the number of bytes to move. - operands[3] is the alignment. */ + operands[3] is the alignment. -void + Returns 1 upon success, 0 otherwise. */ + +int m32r_expand_block_move (rtx operands[]) { rtx orig_dst = operands[0]; @@ -2218,7 +2220,7 @@ m32r_expand_block_move (rtx operands[]) rtx dst_reg; if (constp && bytes <= 0) - return; + return 1; /* Move the address into scratch registers. */ dst_reg = copy_addr_to_reg (XEXP (orig_dst, 0)); @@ -2233,7 +2235,7 @@ m32r_expand_block_move (rtx operands[]) if (optimize_size || ! constp || align != UNITS_PER_WORD) { block_move_call (dst_reg, src_reg, bytes_rtx); - return; + return 0; } leftover = bytes % MAX_MOVE_BYTES; @@ -2290,6 +2292,7 @@ m32r_expand_block_move (rtx operands[]) emit_insn (gen_movmemsi_internal (dst_reg, src_reg, GEN_INT (leftover), gen_reg_rtx (SImode), gen_reg_rtx (SImode))); + return 1; } |