diff options
| author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1998-04-01 05:20:26 +0000 |
|---|---|---|
| committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1998-04-01 05:20:26 +0000 |
| commit | cc51d4989fbd3a1ea3629acf0754c810134263f9 (patch) | |
| tree | 84f0e70b65ebdc968e5fa3ba0c8eac667a10255b /gcc/config/m68k/m68k.md | |
| parent | 7a1f3a7953f5e6ad6df7c262d39348c9599619fc (diff) | |
| download | gcc-cc51d4989fbd3a1ea3629acf0754c810134263f9.tar.gz | |
* 1750a.md, arm.c, clipper.c, clipper.md: Use GEN_INT consistently.
* convex.h, dsp16xx.c, fx80.md, gmicro.c, gmicro.md: Likewise.
* i370.h, i370.md, i860.c, i860.h, i860.md, i960.c: Likewise.
* i960.h, i960.md, m32r.md, m68k.md, m68kv4.h, m88k.c: Likewise.
* m88k.md, ns32k.c, ns32k.md, pdp11.c, pdp11.h, pdp11.md: Likewise.
* pyr.c, pyr.h, pyr.md, romp.c, romp.h, romp.md: Likewise.
* rs6000.md, sparc.c, sparc.h, sparc.md, spur.c, spur.md: Likewise.
* tahoe.md, vax.h, vax.md, we32k.c, we32k.h, we32k.md: Likewise.
* md.texi: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@18927 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68k/m68k.md')
| -rw-r--r-- | gcc/config/m68k/m68k.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 52b3fd06ac8..3a9f3310eec 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -4519,7 +4519,7 @@ return \"add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asl%.l %2,%1\" : \"moveq %2,%0\;asl%.l %0,%1\", operands); return \"mov%.l %1,%0\;moveq %#0,%1\"; @@ -4726,7 +4726,7 @@ return \"asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asr%.l %2,%0\" : \"moveq %2,%1\;asr%.l %1,%0\", operands); output_asm_insn (\"mov%.l %0,%1\;smi %0\", operands); @@ -4894,7 +4894,7 @@ return \"lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"lsr%.l %2,%0\" : \"moveq %2,%1\;lsr%.l %1,%0\", operands); return \"mov%.l %0,%1\;moveq %#0,%0\"; |