Merge in gcc2-ss-010999

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@29150 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 62 insertions, 94 deletions

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 33c9885c331..37e5ea32c17 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1504,7 +1504,7 @@
   "*
 {
   CC_STATUS_INIT;
-  operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+  operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
   return \"moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2\";
 }")
 
@@ -1515,7 +1515,7 @@
   "*
 {
   CC_STATUS_INIT;
-  operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+  operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
   return \"moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2\";
 }")
 
@@ -2197,32 +2197,33 @@
 	return \"add%.l %R2,%R0\;addx%.l %2,%0\";
       else if (GET_CODE (operands[2]) == MEM
 	  && GET_CODE (XEXP (operands[2], 0)) == POST_INC)
-	{
-	  return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\";
-	}
+	return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\";
       else
 	{
+	  rtx high, low;
 	  rtx xoperands[2];
+
 	  if (GET_CODE (operands[2]) == REG)
-	    operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
-	  else if (GET_CODE (operands[2]) == CONST_DOUBLE)
 	    {
-	      operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
-	      operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
+	      low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
+	      high = operands[2];
 	    }
-	  else if (GET_CODE (operands[2]) == CONST_INT)
+	  else if (CONSTANT_P (operands[2]))
+	    split_double (operands[2], &high, &low);
+	  else
 	    {
-	      operands[1] = operands[2];
-	      operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx;
+	      low = adj_offsettable_operand (operands[2], 4);
+	      high = operands[2];
 	    }
-	  else
-	    operands[1] = adj_offsettable_operand (operands[2], 4);
+
+	  operands[1] = low, operands[2] = high;
 	  xoperands[0] = operands[3];
 	  if (GET_CODE (operands[1]) == CONST_INT
 	      && INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0)
 	    xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1);
 	  else
 	    xoperands[1] = operands[2];
+
 	  output_asm_insn (output_move_simode (xoperands), xoperands);
 	  if (GET_CODE (operands[1]) == CONST_INT)
 	    {
@@ -2255,10 +2256,8 @@
       CC_STATUS_INIT;
       if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
 	{
-	  operands[1]
-	    = gen_rtx_MEM (SImode,
-			   gen_rtx_PLUS (VOIDmode, XEXP(operands[0], 0),
-					 GEN_INT (-8)));
+	  operands[1] = gen_rtx_MEM (SImode,
+				     plus_constant (XEXP(operands[0], 0), -8));
 	  return \"move%.l %0,%3\;add%.l %R2,%0\;addx%.l %2,%3\;move%.l %3,%1\";
 	}
       else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
@@ -2368,7 +2367,7 @@
       if (INTVAL (operands[2]) < 0
 	  && INTVAL (operands[2]) >= -8)
 	{
-	  operands[2] = GEN_INT (-INTVAL (operands[2]));
+	  operands[2] = GEN_INT (- INTVAL (operands[2]));
 	  return \"subq%.w %2,%0\";
 	}
       /* On the CPU32 it is faster to use two addqw instructions to
@@ -2385,7 +2384,7 @@
 	  if (INTVAL (operands[2]) < -8
 	      && INTVAL (operands[2]) >= -16)
 	    {
-	      operands[2] = GEN_INT (-INTVAL (operands[2]) - 8);
+	      operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
 	      return \"subq%.w %#8,%0\;subq%.w %2,%0\";
 	    }
 	}
@@ -2430,7 +2429,7 @@
       if (INTVAL (operands[1]) < 0
 	  && INTVAL (operands[1]) >= -8)
 	{
-	  operands[1] = GEN_INT (-INTVAL (operands[1]));
+	  operands[1] = GEN_INT (- INTVAL (operands[1]));
 	  return \"subq%.w %1,%0\";
 	}
       /* On the CPU32 it is faster to use two addqw instructions to
@@ -2447,7 +2446,7 @@
 	  if (INTVAL (operands[1]) < -8
 	      && INTVAL (operands[1]) >= -16)
 	    {
-	      operands[1] = GEN_INT (-INTVAL (operands[1]) - 8);
+	      operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
 	      return \"subq%.w %#8,%0\;subq%.w %1,%0\";
 	    }
 	}
@@ -2486,7 +2485,7 @@
       if (INTVAL (operands[1]) < 0
 	  && INTVAL (operands[1]) >= -8)
 	{
-	  operands[1] = GEN_INT (-INTVAL (operands[1]));
+	  operands[1] = GEN_INT (- INTVAL (operands[1]));
 	  return \"subq%.w %1,%0\";
 	}
       /* On the CPU32 it is faster to use two addqw instructions to
@@ -2503,7 +2502,7 @@
 	  if (INTVAL (operands[1]) < -8
 	      && INTVAL (operands[1]) >= -16)
 	    {
-	      operands[1] = GEN_INT (-INTVAL (operands[1]) - 8);
+	      operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
 	      return \"subq%.w %#8,%0\;subq%.w %1,%0\";
 	    }
 	}
@@ -2536,7 +2535,7 @@
 	return \"addq%.b %2,%0\";
       if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8)
        {
-	 operands[2] = GEN_INT (-INTVAL (operands[2]));
+	 operands[2] = GEN_INT (- INTVAL (operands[2]));
 	 return \"subq%.b %2,%0\";
        }
     }
@@ -2562,7 +2561,7 @@
 	return \"addq%.b %1,%0\";
       if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8)
        {
-	 operands[1] = GEN_INT (-INTVAL (operands[1]));
+	 operands[1] = GEN_INT (- INTVAL (operands[1]));
 	 return \"subq%.b %1,%0\";
        }
     }
@@ -2588,7 +2587,7 @@
 	return \"addq%.b %1,%0\";
       if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8)
        {
-	 operands[1] = GEN_INT (-INTVAL (operands[1]));
+	 operands[1] = GEN_INT (- INTVAL (operands[1]));
 	 return \"subq%.b %1,%0\";
        }
     }
@@ -2763,27 +2762,30 @@
 	}
       else
 	{
+	  rtx high, low;
 	  rtx xoperands[2];
+
 	  if (GET_CODE (operands[2]) == REG)
-	    operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
-	  else if (GET_CODE (operands[2]) == CONST_DOUBLE)
 	    {
-	      operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
-	      operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
+	      low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
+	      high = operands[2];
 	    }
-	  else if (GET_CODE (operands[2]) == CONST_INT)
+	  else if (CONSTANT_P (operands[2]))
+	    split_double (operands[2], &high, &low);
+	  else
 	    {
-	      operands[1] = operands[2];
-	      operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx;
+	      low = adj_offsettable_operand (operands[2], 4);
+	      high = operands[2];
 	    }
-	  else
-	    operands[1] = adj_offsettable_operand (operands[2], 4);
+
+	  operands[1] = low, operands[2] = high;
 	  xoperands[0] = operands[3];
 	  if (GET_CODE (operands[1]) == CONST_INT
 	      && INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0)
 	    xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1);
 	  else
 	    xoperands[1] = operands[2];
+
 	  output_asm_insn (output_move_simode (xoperands), xoperands);
 	  if (GET_CODE (operands[1]) == CONST_INT)
 	    {
@@ -2817,9 +2819,7 @@
       if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
 	{
 	  operands[1]
-	    = gen_rtx_MEM (SImode,
-			   gen_rtx_PLUS (VOIDmode, XEXP(operands[0], 0),
-					 GEN_INT (-8)));
+	    = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[0], 0), -8));
 	  return \"move%.l %0,%3\;sub%.l %R2,%0\;subx%.l %2,%3\;move%.l %3,%1\";
 	}
       else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
@@ -3641,21 +3641,12 @@
 {
   CC_STATUS_INIT;
   /* We can get CONST_DOUBLE, but also const1_rtx etc. */
-  if (GET_CODE (operands[2]) == CONST_DOUBLE
-     || GET_CODE (operands[2]) == CONST_INT)
+  if (CONSTANT_P (operands[2]))
     {
       rtx hi, lo;
 
-      if (GET_CODE (operands[2]) == CONST_DOUBLE)
-	{
-	  hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
-	  lo = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
-	}
-      else
-	{
-	  lo = operands[2];
-	  hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx;
-	}
+      split_double (operands[2], &hi, &lo);
+
       switch (INTVAL (hi))
 	{
 	  case 0 :
@@ -3790,7 +3781,7 @@
 
   CC_STATUS_INIT;
   if (GET_CODE (operands[0]) == REG)
-    operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+    operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
   else
     operands[0] = adj_offsettable_operand (operands[0], 4);
   if (GET_MODE (operands[1]) == SImode)
@@ -3814,21 +3805,12 @@
 {
   CC_STATUS_INIT;
   /* We can get CONST_DOUBLE, but also const1_rtx etc. */
-  if (GET_CODE (operands[2]) == CONST_DOUBLE
-     || GET_CODE (operands[2]) == CONST_INT)
+  if (CONSTANT_P (operands[2]))
     {
       rtx hi, lo;
 
-      if (GET_CODE (operands[2]) == CONST_DOUBLE)
-	{
-	  hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
-	  lo = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
-	}
-      else
-	{
-	  lo = operands[2];
-	  hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx;
-	}
+      split_double (operands[2], &hi, &lo);
+
       switch (INTVAL (hi))
 	{
 	  case 0 :
@@ -4001,21 +3983,13 @@
 {
   CC_STATUS_INIT;
   /* We can get CONST_DOUBLE, but also const1_rtx etc. */
-  if (GET_CODE (operands[2]) == CONST_DOUBLE
-     || GET_CODE (operands[2]) == CONST_INT)
+
+  if (CONSTANT_P (operands[2]))
     {
       rtx hi, lo;
 
-      if (GET_CODE (operands[2]) == CONST_DOUBLE)
-	{
-	  hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
-	  lo = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
-	}
-      else
-	{
-	  lo = operands[2];
-	  hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx;
-	}
+      split_double (operands[2], &hi, &lo);
+
       switch (INTVAL (hi))
 	{
 	  case 0 :
@@ -4248,7 +4222,7 @@
       target = operand_subword_force (operands[0], 0, SFmode);
       result = expand_binop (SImode, xor_optab,
 			     operand_subword_force (operands[1], 0, SFmode),
-			     GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
+			     GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
       if (result == 0)
 	abort ();
 
@@ -4299,7 +4273,7 @@
       target = operand_subword (operands[0], 0, 1, DFmode);
       result = expand_binop (SImode, xor_optab,
 			     operand_subword_force (operands[1], 0, DFmode),
-			     GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
+			     GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
       if (result == 0)
 	abort ();
 
@@ -4382,7 +4356,7 @@
       target = operand_subword_force (operands[0], 0, SFmode);
       result = expand_binop (SImode, and_optab,
 			     operand_subword_force (operands[1], 0, SFmode),
-			     GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN);
+			     GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
       if (result == 0)
 	abort ();
 
@@ -4428,7 +4402,7 @@
       target = operand_subword (operands[0], 0, 1, DFmode);
       result = expand_binop (SImode, and_optab,
 			     operand_subword_force (operands[1], 0, DFmode),
-			     GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN);
+			     GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
       if (result == 0)
 	abort ();
 
@@ -5645,8 +5619,7 @@
       int width = GET_CODE (operands[0]) == REG ? 31 : 7;
       return output_btst (operands,
 			  GEN_INT (width - INTVAL (operands[2])),
-			  operands[0],
-			  insn, 1000);
+			  operands[0], insn, 1000);
       /* Pass 1000 as SIGNPOS argument so that btst will
          not think we are testing the sign bit for an `and'
 	 and assume that nonzero implies a negative result.  */
@@ -5670,10 +5643,8 @@
       && GET_CODE (operands[2]) == CONST_INT)
     {
       int width = GET_CODE (operands[0]) == REG ? 31 : 7;
-      return output_btst (operands,
-			  GEN_INT (width - INTVAL (operands[2])),
-			  operands[0],
-			  insn, 1000);
+      return output_btst (operands, GEN_INT (width - INTVAL (operands[2])),
+			  operands[0], insn, 1000);
       /* Pass 1000 as SIGNPOS argument so that btst will
          not think we are testing the sign bit for an `and'
 	 and assume that nonzero implies a negative result.  */
@@ -7003,8 +6974,7 @@
  "NEED_PROBE"
  "*
 {
-  operands[0] = gen_rtx_PLUS (SImode, stack_pointer_rtx,
-			      GEN_INT (NEED_PROBE));
+  operands[0] = plus_constant (stack_pointer_rtx, NEED_PROBE);
   return \"tstl %a0\";
 }")
 
@@ -7207,9 +7177,7 @@
 
   xoperands[1] = operands[1];
   xoperands[2]
-    = gen_rtx_MEM (QImode,
-		   gen_rtx_PLUS (VOIDmode, stack_pointer_rtx,
-				 GEN_INT (3)));
+    = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3));
   xoperands[3] = stack_pointer_rtx;
   if (!TARGET_5200)
     output_asm_insn (\"subq%.w %#4,%3\;move%.b %1,%2\", xoperands);
@@ -7552,7 +7520,7 @@
       if (REG_P (operands[1]))
 	{
 	  rtx xoperands[2];
-	  xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+	  xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
 	  output_asm_insn (\"move%.l %1,%-\", xoperands);
 	  output_asm_insn (\"move%.l %1,%-\", operands);
 	  return \"f%&move%.d %+,%0\";
@@ -7784,7 +7752,7 @@
       target = operand_subword (operands[0], 0, 1, XFmode);
       result = expand_binop (SImode, xor_optab,
 			     operand_subword_force (operands[1], 0, XFmode),
-			     GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
+			     GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
       if (result == 0)
 	abort ();
 
@@ -7833,7 +7801,7 @@
       target = operand_subword (operands[0], 0, 1, XFmode);
       result = expand_binop (SImode, and_optab,
 			     operand_subword_force (operands[1], 0, XFmode),
-			     GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN);
+			     GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
       if (result == 0)
 	abort ();