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| author | kenner <kenner@138bc75d-0d04-0410-961f-82ee72b054a4> | 1994-12-08 20:41:17 +0000 |
|---|---|---|
| committer | kenner <kenner@138bc75d-0d04-0410-961f-82ee72b054a4> | 1994-12-08 20:41:17 +0000 |
| commit | 57a52c8dadb640ee03ef6e7fe4ba1cef96108d23 (patch) | |
| tree | 721d9c37ae789c4f1e841012c6b552ed0db4f759 /gcc/config/m68k | |
| parent | 748b668815e04f1f14039d1a04cbf413fbc12504 (diff) | |
| download | gcc-57a52c8dadb640ee03ef6e7fe4ba1cef96108d23.tar.gz | |
(bsetmemqi, bclrmemqi): New patterns to set bit in memory byte with
bit number dynamic (use bclr/bset instructions).
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@8631 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68k')
| -rw-r--r-- | gcc/config/m68k/m68k.md | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 2afdedc7fd0..cfb5704f0eb 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -3831,6 +3831,65 @@ "" "ror%.b %1,%0") + +;; Bit set/clear in memory byte. + +;; set bit, bit number is int +(define_insn "bsetmemqi" + [(set (match_operand:QI 0 "memory_operand" "+m") + (ior:QI (subreg:QI (ashift:SI (const_int 1) + (match_operand:SI 1 "general_operand" "d")) 0) + (match_dup 0)))] + "" + "* +{ + CC_STATUS_INIT; + return \"bset %1,%0\"; +}") + +;; set bit, bit number is (sign/zero)_extended from HImode/QImode +(define_insn "" + [(set (match_operand:QI 0 "memory_operand" "+m") + (ior:QI (subreg:QI (ashift:SI (const_int 1) + (match_operator:SI 2 "extend_operator" + [(match_operand 1 "general_operand" "d")])) 0) + (match_dup 0)))] + "" + "* +{ + CC_STATUS_INIT; + return \"bset %1,%0\"; +}") + +;; clear bit, bit number is int +(define_insn "bclrmemqi" + [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m") + (const_int 1) + (minus:SI (const_int 7) + (match_operand:SI 1 "general_operand" "d"))) + (const_int 0))] + "" + "* +{ + CC_STATUS_INIT; + return \"bclr %1,%0\"; +}") + +;; clear bit, bit number is (sign/zero)_extended from HImode/QImode +(define_insn "" + [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m") + (const_int 1) + (minus:SI (const_int 7) + (match_operator:SI 2 "extend_operator" + [(match_operand 1 "general_operand" "d")]))) + (const_int 0))] + "" + "* +{ + CC_STATUS_INIT; + return \"bclr %1,%0\"; +}") + ;; Special cases of bit-field insns which we should ;; recognize in preference to the general case. ;; These handle aligned 8-bit and 16-bit fields, |