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authoreager <eager@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-27 00:02:40 +0000
committereager <eager@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-27 00:02:40 +0000
commit914e5496b3439f764262552ae299bcfb2a6e1b7f (patch)
tree87581ef83e545999f52828c236d008b1e5d4a340 /gcc/config/microblaze
parent3ed3cfc307dfcbe951ae729d660cfe7162d6d9ab (diff)
downloadgcc-914e5496b3439f764262552ae299bcfb2a6e1b7f.tar.gz
Revert 200443.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200444 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/microblaze')
-rw-r--r--gcc/config/microblaze/constraints.md5
-rw-r--r--gcc/config/microblaze/microblaze.c10
-rw-r--r--gcc/config/microblaze/microblaze.md4
-rw-r--r--gcc/config/microblaze/sync.md65
4 files changed, 0 insertions, 84 deletions
diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
index c9c164962cd..c6fbc987819 100644
--- a/gcc/config/microblaze/constraints.md
+++ b/gcc/config/microblaze/constraints.md
@@ -70,8 +70,3 @@
"Double word operand."
(and (match_code "mem")
(match_test "double_memory_operand (op, GET_MODE (op))")))
-
-(define_memory_constraint "Q"
- "Memory operand which is a single register."
- (and (match_code "mem")
- (match_test "GET_CODE ( XEXP (op, 0)) == REG")))
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index ea2b033becb..c121c2baec3 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -2118,7 +2118,6 @@ microblaze_initial_elimination_offset (int from, int to)
't' print 't' for EQ, 'f' for NE
'm' Print 1<<operand.
'i' Print 'i' if MEM operand has immediate value
- 'y' Print 'y' if MEM operand is single register
'o' Print operand address+4
'?' Print 'd' if we use a branch with delay slot instead of normal branch.
'h' Print high word of const_double (int or float) value as hex
@@ -2289,15 +2288,6 @@ print_operand (FILE * file, rtx op, int letter)
rtx op4 = adjust_address (op, GET_MODE (op), 4);
output_address (XEXP (op4, 0));
}
- else if (letter == 'y')
- {
- rtx mem_reg = XEXP (op, 0);
- if (GET_CODE (mem_reg) == REG)
- {
- register int regnum = REGNO (mem_reg);
- fprintf (file, "%s", reg_names[regnum]);
- }
- }
else
output_address (XEXP (op, 0));
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
index 6e7b72d2267..3618cad524b 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -41,8 +41,6 @@
(UNSPEC_CMP 104) ;; signed compare
(UNSPEC_CMPU 105) ;; unsigned compare
(UNSPEC_TLS 106) ;; jump table
- (UNSPEC_SYNC_CAS 107) ;; Represent atomic compare swap.
- (UNSPEC_SYNC_XCHG 108) ;; Represent atomic exchange.
])
@@ -2223,5 +2221,3 @@
[(set_attr "type" "arith")
(set_attr "mode" "SI")
(set_attr "length" "4")])
-
-(include "sync.md")
diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
deleted file mode 100644
index 3be95b4d0af..00000000000
--- a/gcc/config/microblaze/sync.md
+++ /dev/null
@@ -1,65 +0,0 @@
-;; Machine description for Xilinx MicroBlaze synchronization instructions.
-;; Copyright (C) 2011-2013
-;; Free Software Foundation, Inc.
-;;
-;; This file is part of GCC.
-;;
-;; GCC is free software; you can redistribute it and/or modify
-;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 3, or (at your option)
-;; any later version.
-;;
-;; GCC is distributed in the hope that it will be useful,
-;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;; GNU General Public License for more details.
-;;
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3. If not see
-;; <http://www.gnu.org/licenses/>.
-
-
-(define_insn "sync_compare_and_swapsi"
- [(set (match_operand:SI 0 "register_operand" "=&d") ;; retval
- (match_operand:SI 1 "nonimmediate_operand" "+Q")) ;; mem
- (set (match_dup 1)
- (unspec
- [(match_operand:SI 2 "register_operand" "d") ;; oldval
- (match_operand:SI 3 "register_operand" "d")] ;; newval
- UNSPEC_SYNC_CAS))
- (clobber (match_scratch:SI 4 "=&d"))] ;; scratch
- ""
- {
- output_asm_insn ("addc \tr0,r0,r0", operands);
- output_asm_insn ("lwx \t%0,%y1,r0", operands);
- output_asm_insn ("addic\t%4,r0,0", operands);
- output_asm_insn ("bnei \t%4,.-8", operands);
- output_asm_insn ("cmp \t%4,%0,%2", operands);
- output_asm_insn ("bnei \t%4,.+16", operands);
- output_asm_insn ("swx \t%3,%y1,r0", operands);
- output_asm_insn ("addic\t%4,r0,0", operands);
- output_asm_insn ("bnei \t%4,.-28", operands);
- return "";
- }
-)
-
-(define_insn "sync_test_and_setsi"
- [(set (match_operand:SI 0 "register_operand" "=&d") ;; retval
- (match_operand:SI 1 "nonimmediate_operand" "+Q")) ;; mem
- (set (match_dup 1)
- (unspec
- [(match_operand:SI 2 "register_operand" "d")] ;; value
- UNSPEC_SYNC_XCHG))
- (clobber (match_scratch:SI 3 "=&d"))] ;; scratch
- ""
- {
- output_asm_insn ("addc \tr0,r0,r0", operands);
- output_asm_insn ("lwx \t%0,%y1,r0", operands);
- output_asm_insn ("addic\t%3,r0,0", operands);
- output_asm_insn ("bnei \t%3,.-8", operands);
- output_asm_insn ("swx \t%2,%y1,r0", operands);
- output_asm_insn ("addic\t%3,r0,0", operands);
- output_asm_insn ("bnei \t%3,.-20", operands);
- return "";
- }
-)