diff options
| author | Sandra Loosemore <sandra@codesourcery.com> | 2012-08-06 17:28:34 -0400 |
|---|---|---|
| committer | Sandra Loosemore <sandra@gcc.gnu.org> | 2012-08-06 17:28:34 -0400 |
| commit | d28cfc4ae6c8651b1631c8c00f016d8258de7458 (patch) | |
| tree | 6969d0e209fded256605c8bb492c67096e6f2f6a /gcc/config/mips/74k.md | |
| parent | edc802c796309ed06d4818ad8a7c8b851a52b9ea (diff) | |
| download | gcc-d28cfc4ae6c8651b1631c8c00f016d8258de7458.tar.gz | |
24k.md (r24k_unknown_store): Delete special handling for cprestore.
2012-08-06 Sandra Loosemore <sandra@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
Julian Brown <julian@codesourcery.com>
gcc/
* config/mips/24k.md (r24k_unknown_store): Delete special handling
for cprestore.
(r24k_int_load, r24k_int_arith, r24k_int_mul3, r24k_int_mfhilo)
(r24k_int_cop, r24k_int_multi)
(r24kf2_1_fcvt_f2i, r24kf2_1_fxfer)
(r24kf1_1_fcvt_f2i, r24kf1_1_fxfer): Use mips_store_data_bypass_p
instead of store_data_bypass_p.
* config/mips/74k.md (r74k_int_store): Delete special handling for
cprestore.
(r74k_int_load, r74k_int_logical, r74k_int_arith, r74k_int_cmove):
Use mips_store_data_bypass_p instead of store_data_bypass_p.
Co-Authored-By: Julian Brown <julian@codesourcery.com>
Co-Authored-By: Maxim Kuvyrkov <maxim@codesourcery.com>
From-SVN: r190189
Diffstat (limited to 'gcc/config/mips/74k.md')
| -rw-r--r-- | gcc/config/mips/74k.md | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/gcc/config/mips/74k.md b/gcc/config/mips/74k.md index cd0a76da344..4a9cb65ae00 100644 --- a/gcc/config/mips/74k.md +++ b/gcc/config/mips/74k.md @@ -118,8 +118,7 @@ ;; stores (define_insn_reservation "r74k_int_store" 1 (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2") - (and (eq_attr "type" "store") - (eq_attr "mode" "!unknown"))) + (eq_attr "type" "store")) "r74k_agen") @@ -145,25 +144,27 @@ ;; load->load base: 4 cycles ;; load->store base: 4 cycles (define_bypass 4 "r74k_int_load" "r74k_int_load") -(define_bypass 4 "r74k_int_load" "r74k_int_store" "!store_data_bypass_p") +(define_bypass 4 "r74k_int_load" "r74k_int_store" "!mips_store_data_bypass_p") ;; logical/move/slt/signext->next use : 1 cycles (Default) ;; logical/move/slt/signext->load base: 2 cycles ;; logical/move/slt/signext->store base: 2 cycles (define_bypass 2 "r74k_int_logical" "r74k_int_load") -(define_bypass 2 "r74k_int_logical" "r74k_int_store" "!store_data_bypass_p") +(define_bypass 2 "r74k_int_logical" "r74k_int_store" + "!mips_store_data_bypass_p") ;; arith->next use : 2 cycles (Default) ;; arith->load base: 3 cycles ;; arith->store base: 3 cycles (define_bypass 3 "r74k_int_arith" "r74k_int_load") -(define_bypass 3 "r74k_int_arith" "r74k_int_store" "!store_data_bypass_p") +(define_bypass 3 "r74k_int_arith" "r74k_int_store" "!mips_store_data_bypass_p") ;; cmove->next use : 4 cycles (Default) ;; cmove->load base: 5 cycles ;; cmove->store base: 5 cycles (define_bypass 5 "r74k_int_cmove" "r74k_int_load") -(define_bypass 5 "r74k_int_cmove" "r74k_int_store" "!store_data_bypass_p") +(define_bypass 5 "r74k_int_cmove" "r74k_int_store" + "!mips_store_data_bypass_p") ;; mult/madd/msub->int_mfhilo : 4 cycles (default) ;; mult->madd/msub : 1 cycles |