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authorpinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4>2011-12-13 20:00:18 +0000
committerpinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4>2011-12-13 20:00:18 +0000
commitcaa36f1c53396b91841cf73c89bc2f91ee5d2941 (patch)
tree9a538648d131fc8ab5f0b00a0e37b83fb46a7aa5 /gcc/config/mips/mips.h
parent3643e31df98024f1435ec08601c49c84ba407d3a (diff)
downloadgcc-caa36f1c53396b91841cf73c89bc2f91ee5d2941.tar.gz
2011-12-13 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com> * config/mips/mips-cpus.def: Add Octeon2. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.md (define_attr "cpu"): Add Octeon2. * config/mips/driver-native.c (host_detect_local_cpu): Support Octeon2 also. * config/mips/octeon.md (octeon_arith): Add Octeon2. (octeon_condmove): Likewise. (octeon_load): Rename to .. (octeon_load_o1): this. (octeon_load_o2): New reserve. (octeon_cop_o2): New reserve. (octeon_store): Match Octeon2 also. (octeon_brj): Rename to .. (octeon_brj_o1): this. (octeon_brj_o2): New reserve. (octeon_imul3): Rename to ... (octeon_imul3_o1): this. (octeon_imul3_o2): New reserve. (octeon_imul): Rename to ... (octeon_imul_o1): this. (octeon_imul_o2): New reserve. (octeon_mfhilo): Rename to ... (octeon_mfhilo_o1): This. (octeon_mfhilo_o2): New reserve. (octeon_imadd): Rename to ... (octeon_imadd_o1): this. (octeon_imadd_o2): New reserve. (octeon_idiv): Rename to .. (octeon_idiv_o1): This. (octeon_idiv_o2_si): New reserve. (octeon_idiv_o2_di): Likewise. (octeon_unknown): Match Octeon2 also. * config/mips/mips.c (mips_rtx_cost_data): Add Octeon2 cost data. (mips_issue_rate): Octeon2 can issue 2 at a time. * config/mips/mips.h (TARGET_OCTEON): Match Octeon2 also. (TARGET_OCTEON2): New define. (TUNE_OCTEON): Match Octeon2 also. 2011-12-13 Andrew Pinski <apinski@cavium.com> Adam Nemet <anemet@caviumnetworks.com> * gcc.target/mips/mips.exp (mips_option_groups): Fix debug. Add -fdump-* options. * gcc.target/mips/octeon2-pipe-1.c: New testcase. * gcc.target/mips/octeon-pipe-1.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182300 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/mips.h')
-rw-r--r--gcc/config/mips/mips.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index ee40cfabc9a..55f9b07c416 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -222,7 +222,9 @@ struct mips_cpu_info {
#define TARGET_MIPS5500 (mips_arch == PROCESSOR_R5500)
#define TARGET_MIPS7000 (mips_arch == PROCESSOR_R7000)
#define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000)
-#define TARGET_OCTEON (mips_arch == PROCESSOR_OCTEON)
+#define TARGET_OCTEON (mips_arch == PROCESSOR_OCTEON \
+ || mips_arch == PROCESSOR_OCTEON2)
+#define TARGET_OCTEON2 (mips_arch == PROCESSOR_OCTEON2)
#define TARGET_SB1 (mips_arch == PROCESSOR_SB1 \
|| mips_arch == PROCESSOR_SB1A)
#define TARGET_SR71K (mips_arch == PROCESSOR_SR71000)
@@ -250,7 +252,8 @@ struct mips_cpu_info {
#define TUNE_MIPS6000 (mips_tune == PROCESSOR_R6000)
#define TUNE_MIPS7000 (mips_tune == PROCESSOR_R7000)
#define TUNE_MIPS9000 (mips_tune == PROCESSOR_R9000)
-#define TUNE_OCTEON (mips_tune == PROCESSOR_OCTEON)
+#define TUNE_OCTEON (mips_tune == PROCESSOR_OCTEON \
+ || mips_tune == PROCESSOR_OCTEON2)
#define TUNE_SB1 (mips_tune == PROCESSOR_SB1 \
|| mips_tune == PROCESSOR_SB1A)