2013-03-25 Catherine Moore <clm@codesourcery.com>

	* config/mips/constraints.md (u, Udb7 Uead, Uean, Uesp, Uib3,
	Uuw6, Usb4, ZS, ZT, ZU, ZV, ZW): New constraints.
	* config/mip/predicates.md (lwsp_swsp_operand,
	lw16_sw16_operand, lhu16_sh16_operand, lbu16_operand,
	sb16_operand, db4_operand, db7_operand, ib3_operand,
	sb4_operand, ub4_operand, uh4_operand, uw4_operand,
	uw5_operand, uw6_operand, addiur2_operand, addiusp_operand,
	andi16_operand): New predicates.
	* config/mips/mips.md (compression): New attribute.
	(enabled): New attribute.
	(length): Consider compression in computing length.
	(shift_compression): New code attribute.
	(*add<mode>3): New operands. Record compression.
	(sub<mode>3): Likewise.
	(one_cmpl<mode>2): Likewise.
	(*and<mode>3): Likewise.
	(*ior<mode>3): Likewise.
	(unnamed pattern for xor): Likewise.
	(*zero_extend<SHORT:mode><GPR:mode>2): Likewise.
	(*<optab><mode>3): Likewise.
	(*mov<mode>_internal: Likewise.
	* config/mips/mips-protos.h (mips_signed_immediate_p): New.
	(mips_unsigned_immediate_p): New.
	(umips_lwsp_swsp_address_p): New.
	(m16_based_address_p): New.
	* config/mips/mips-protos.h (mips_signed_immediate_p): New prototype.
	(mips_unsigned_immediate_p): New prototype.
	(lwsp_swsp_address_p): New prototype.
	(m16_based_address_p): New prototype.
	* config/mips/mips.c (mips_unsigned_immediate_p): New function.
	(mips_signed_immediate_p): New function.
	(m16_based_address_p): New function.
	(lwsp_swsp_address_p): New function.
	(mips_print_operand_punctuation): Recognize short delay slot insns
	for microMIPS.add<mode>3"


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@197042 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 83 insertions, 0 deletions

diff --git a/gcc/config/mips/predicates.md b/gcc/config/mips/predicates.md
index c6d7707093e..57996fa8960 100644
--- a/gcc/config/mips/predicates.md
+++ b/gcc/config/mips/predicates.md
@@ -122,6 +122,89 @@
 		    ? M16_REG_P (REGNO (op))
 		    : GP_REG_P (REGNO (op))")))
 
+(define_predicate "lwsp_swsp_operand"
+  (and (match_code "mem")
+       (match_test "lwsp_swsp_address_p (XEXP (op, 0), mode)")))
+
+(define_predicate "lw16_sw16_operand"
+  (and (match_code "mem")
+       (match_test "m16_based_address_p (XEXP (op, 0), mode, uw4_operand)")))
+
+(define_predicate "lhu16_sh16_operand"
+  (and (match_code "mem")
+       (match_test "m16_based_address_p (XEXP (op, 0), mode, uh4_operand)")))
+
+(define_predicate "lbu16_operand"
+  (and (match_code "mem")
+       (match_test "m16_based_address_p (XEXP (op, 0), mode, db4_operand)")))
+
+(define_predicate "sb16_operand"
+  (and (match_code "mem")
+       (match_test "m16_based_address_p (XEXP (op, 0), mode, ub4_operand)")))
+
+(define_predicate "db4_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 4, 0)")))
+
+(define_predicate "db7_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 7, 0)")))
+
+(define_predicate "ib3_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op) - 1, 3, 0)")))
+
+(define_predicate "sb4_operand"
+  (and (match_code "const_int")
+       (match_test "mips_signed_immediate_p (INTVAL (op), 4, 0)")))
+
+(define_predicate "ub4_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 0)")))
+
+(define_predicate "uh4_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 1)")))
+
+(define_predicate "uw4_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 2)")))
+
+(define_predicate "uw5_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op), 5, 2)")))
+
+(define_predicate "uw6_operand"
+  (and (match_code "const_int")
+       (match_test "mips_unsigned_immediate_p (INTVAL (op), 6, 2)")))
+
+(define_predicate "addiur2_operand"
+  (and (match_code "const_int")
+	(ior (match_test "INTVAL (op) == -1")
+	     (match_test "INTVAL (op) == 1")
+	     (match_test "INTVAL (op) == 4")
+	     (match_test "INTVAL (op) == 8")
+	     (match_test "INTVAL (op) == 12")
+	     (match_test "INTVAL (op) == 16")
+	     (match_test "INTVAL (op) == 20")
+	     (match_test "INTVAL (op) == 24"))))
+
+(define_predicate "addiusp_operand"
+  (and (match_code "const_int")
+       (ior (match_test "(IN_RANGE (INTVAL (op), 2, 257))")
+	    (match_test "(IN_RANGE (INTVAL (op), -258, -3))"))))
+
+(define_predicate "andi16_operand"
+  (and (match_code "const_int")
+	(ior (match_test "IN_RANGE (INTVAL (op), 1, 4)")
+	     (match_test "IN_RANGE (INTVAL (op), 7, 8)")
+	     (match_test "IN_RANGE (INTVAL (op), 15, 16)")
+	     (match_test "IN_RANGE (INTVAL (op), 31, 32)")
+	     (match_test "IN_RANGE (INTVAL (op), 63, 64)")
+	     (match_test "INTVAL (op) == 255")
+	     (match_test "INTVAL (op) == 32768")
+	     (match_test "INTVAL (op) == 65535"))))
+
 (define_predicate "movep_src_register"
   (and (match_code "reg")
        (ior (match_test ("IN_RANGE (REGNO (op), 2, 3)"))