diff options
| author | nickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-10-29 08:53:47 +0000 |
|---|---|---|
| committer | nickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-10-29 08:53:47 +0000 |
| commit | 4879b320cd972df1525bddfc1562cb2cca7a1aa1 (patch) | |
| tree | e6ae4bf66634186860949005668690b4e9f2d6e5 /gcc/config/mn10300/mn10300.h | |
| parent | d86d3e366346f9cc270a1b52fba10d88d5e9a5b7 (diff) | |
| download | gcc-4879b320cd972df1525bddfc1562cb2cca7a1aa1.tar.gz | |
* doc/invoke.texi: Document -mam34 and -mtune options.
* config/mn10300/mn10300.c (mn10300_tune_string): New variable.
(mn10300_tune_cpu): New variable.
(mn10300_handle_option): Handle -mam34 and -mtune options.
(mn10300_option_override): Convert tune string into tune cpu
variable.
(mn10300_legitimate_constant_p): Delete unused local variable.
(is_load_insn): New function.
(is_store_insn): New function.
(mn10300_adjust_schedule_cost): New function.
(TARGET_SCHED_ADJUST_COST): Define.
* config/mn10300/mn10300.opt (mam34): New option.
(mtune): New option.
* config/mn10300/mn10300.h (TARGET_CPU_CPP_BUILTINS): Add AM34
support.
(enum processor_type): Add AM34.
(TARGET_AM34): Define.
* config/mn10300/mn10300.md (attr cpu): Add am34.
Add pipeline description.
(movqi, movhi, movsi, movsf, movdf, movdi): Fix predicates. Remove unneeded
alternatives. Add timing attribute.
(pop_pic_reg, am33_addsi3, mn10300_addsi3, am33_subsi3,
mn10300_subsi3, mulsidi3, umulsidi3, am33_mulsi3,
mn10300_mulsi3, udivmodsi4_am33, divmodsi4, am33_andsi3,
mn10300_andsi3, am33_iorsi3, mn10300_iorsi3, am33_xorsi3,
mn10300_xorsi3, byte_clear, byte_set, bit_clear1, bit_clear2,
bit_set, am33_iorqi3, mn10300_iorqi3, test_byte_bitfield,
bit_test, subreg_bit_test, cmpsi, am33_cmpsf, am33_subsi3,
float_conditional_branch, jump, indirect_jump, tablejump,
call_internal, call_value_internal, zero_extendqisi2_am33,
zero_extendqisi2_mn10300, zero_extendhisi2_am33,
zero_extendhisi2_mn10300, extendqisi2_am33, extendqisi2_mn10300,
extendhisi2_am33, extendhisi2_mn10300, am33_ashlsi3,
mn10300_ashlsi3, am33_lshrsi3, mn10300_lshrsi3, am33_ashrisi3,
mn10300_ashrsi3, abssf2_am33_2, negsf2_am33_2, rsqrtsf2,
addsf3_internal, subsf3_internal, mulsf3_internal, divsf3,
fmaddsf4, fmsubsf4, fnmaddsf4, fnmsubsf4, return_internal,
return_internal_regs, store_movm, return, call_next_insn):
Add timing attribute.
(am33_subsi3): Add missing clobber of CC_REG.
(am33_andsi3, mn10300_andsi3): Fix compile time warnings.
(udivmodsi4, udivmodsi4_insn, divmodsi4, test_byte_bitfield,
subreg_bit_test, zero_extendqisi2, zero_extendhisi2,
extendqisi2): Fix predicates.
(call_internal, call_internal_value): Separate alternatives.
* config/mn10300/t-mn10300: Add AM34 multilib.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@166058 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mn10300/mn10300.h')
| -rw-r--r-- | gcc/config/mn10300/mn10300.h | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h index 58f2719cba9..c9f76f87593 100644 --- a/gcc/config/mn10300/mn10300.h +++ b/gcc/config/mn10300/mn10300.h @@ -38,7 +38,12 @@ builtin_assert ("cpu=mn10300"); \ builtin_assert ("machine=mn10300"); \ \ - if (TARGET_AM33_2) \ + if (TARGET_AM34) \ + { \ + builtin_define ("__AM33__=4"); \ + builtin_define ("__AM34__"); \ + } \ + else if (TARGET_AM33_2) \ { \ builtin_define ("__AM33__=2"); \ builtin_define ("__AM33_2__"); \ @@ -54,13 +59,16 @@ enum processor_type { PROCESSOR_MN10300, PROCESSOR_AM33, - PROCESSOR_AM33_2 + PROCESSOR_AM33_2, + PROCESSOR_AM34 }; extern enum processor_type mn10300_processor; +extern enum processor_type mn10300_tune_cpu; #define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33) -#define TARGET_AM33_2 (mn10300_processor == PROCESSOR_AM33_2) +#define TARGET_AM33_2 (mn10300_processor >= PROCESSOR_AM33_2) +#define TARGET_AM34 (mn10300_processor >= PROCESSOR_AM34) #ifndef PROCESSOR_DEFAULT #define PROCESSOR_DEFAULT PROCESSOR_MN10300 @@ -274,7 +282,7 @@ enum reg_class /* Give names of register classes as strings for dump file. */ -#define REG_CLASS_NAMES \ +#define REG_CLASS_NAMES \ { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \ "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \ "EXTENDED_REGS", \ @@ -289,7 +297,7 @@ enum reg_class of length N_REG_CLASSES. */ #define REG_CLASS_CONTENTS \ -{ { 0, 0 }, /* No regs */ \ +{ { 0, 0 }, /* No regs */ \ { 0x0000000f, 0 }, /* DATA_REGS */ \ { 0x000001f0, 0 }, /* ADDRESS_REGS */ \ { 0x00000200, 0 }, /* SP_REGS */ \ @@ -304,7 +312,7 @@ enum reg_class { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \ { 0x00000000, 0x80000 },/* CC_REGS */ \ { 0x0003fdff, 0 }, /* GENERAL_REGS */ \ - { 0xffffffff, 0xfffff } /* ALL_REGS */ \ + { 0xffffffff, 0xfffff } /* ALL_REGS */ \ } /* The following macro defines cover classes for Integrated Register |