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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2015-05-07 16:58:46 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2015-05-07 16:58:46 +0000
commitd1f9b275e42cf5c753e9f05789d89cc132726607 (patch)
treed586b7005253121ffef57e4f1d75d48de1056334 /gcc/config/nds32/nds32.c
parent3dd2833b51262c109ebc4b6f3f93973c286cd7cd (diff)
downloadgcc-d1f9b275e42cf5c753e9f05789d89cc132726607.tar.gz
gcc/
* rtl.h (always_void_p): New function. * gengenrtl.c (always_void_p): Likewise. (genmacro): Don't add a mode parameter to gen_rtx_foo if rtxes with code foo are always VOIDmode. * genemit.c (gen_exp): Update gen_rtx_foo calls accordingly. * builtins.c, caller-save.c, calls.c, cfgexpand.c, combine.c, compare-elim.c, config/aarch64/aarch64.c, config/aarch64/aarch64.md, config/alpha/alpha.c, config/alpha/alpha.md, config/arc/arc.c, config/arc/arc.md, config/arm/arm-fixed.md, config/arm/arm.c, config/arm/arm.md, config/arm/ldrdstrd.md, config/arm/thumb2.md, config/arm/vfp.md, config/avr/avr.c, config/bfin/bfin.c, config/c6x/c6x.c, config/c6x/c6x.md, config/cr16/cr16.c, config/cris/cris.c, config/cris/cris.md, config/darwin.c, config/epiphany/epiphany.c, config/epiphany/epiphany.md, config/fr30/fr30.c, config/frv/frv.c, config/frv/frv.md, config/h8300/h8300.c, config/i386/i386.c, config/i386/i386.md, config/i386/sse.md, config/ia64/ia64.c, config/ia64/vect.md, config/iq2000/iq2000.c, config/iq2000/iq2000.md, config/lm32/lm32.c, config/lm32/lm32.md, config/m32c/m32c.c, config/m32r/m32r.c, config/m68k/m68k.c, config/m68k/m68k.md, config/mcore/mcore.c, config/mcore/mcore.md, config/mep/mep.c, config/microblaze/microblaze.c, config/mips/mips.c, config/mips/mips.md, config/mmix/mmix.c, config/mn10300/mn10300.c, config/msp430/msp430.c, config/nds32/nds32-memory-manipulation.c, config/nds32/nds32.c, config/nds32/nds32.md, config/nios2/nios2.c, config/nvptx/nvptx.c, config/pa/pa.c, config/pa/pa.md, config/rl78/rl78.c, config/rs6000/altivec.md, config/rs6000/rs6000.c, config/rs6000/rs6000.md, config/rs6000/vector.md, config/rs6000/vsx.md, config/rx/rx.c, config/rx/rx.md, config/s390/s390.c, config/s390/s390.md, config/sh/sh.c, config/sh/sh.md, config/sh/sh_treg_combine.cc, config/sparc/sparc.c, config/sparc/sparc.md, config/spu/spu.c, config/spu/spu.md, config/stormy16/stormy16.c, config/tilegx/tilegx.c, config/tilegx/tilegx.md, config/tilepro/tilepro.c, config/tilepro/tilepro.md, config/v850/v850.c, config/v850/v850.md, config/vax/vax.c, config/visium/visium.c, config/xtensa/xtensa.c, cprop.c, dse.c, expr.c, gcse.c, ifcvt.c, ira.c, jump.c, lower-subreg.c, lra-constraints.c, lra-eliminations.c, lra.c, postreload.c, ree.c, reg-stack.c, reload.c, reload1.c, reorg.c, sel-sched.c, var-tracking.c: Update calls accordingly. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222883 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/nds32/nds32.c')
-rw-r--r--gcc/config/nds32/nds32.c46
1 files changed, 21 insertions, 25 deletions
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index b79e33e873a..e617bbf26b5 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -470,7 +470,7 @@ nds32_emit_stack_push_multiple (rtx Rb, rtx Re, rtx En4, bool vaarg_p)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -484,7 +484,7 @@ nds32_emit_stack_push_multiple (rtx Rb, rtx Re, rtx En4, bool vaarg_p)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -496,7 +496,7 @@ nds32_emit_stack_push_multiple (rtx Rb, rtx Re, rtx En4, bool vaarg_p)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -508,7 +508,7 @@ nds32_emit_stack_push_multiple (rtx Rb, rtx Re, rtx En4, bool vaarg_p)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -520,8 +520,7 @@ nds32_emit_stack_push_multiple (rtx Rb, rtx Re, rtx En4, bool vaarg_p)
/* We need to re-calculate the offset value again for adjustment. */
offset = -(num_use_regs * 4);
adjust_sp_rtx
- = gen_rtx_SET (VOIDmode,
- stack_pointer_rtx,
+ = gen_rtx_SET (stack_pointer_rtx,
plus_constant (Pmode, stack_pointer_rtx, offset));
XVECEXP (parallel_insn, 0, par_index) = adjust_sp_rtx;
RTX_FRAME_RELATED_P (adjust_sp_rtx) = 1;
@@ -624,7 +623,7 @@ nds32_emit_stack_pop_multiple (rtx Rb, rtx Re, rtx En4)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -640,7 +639,7 @@ nds32_emit_stack_pop_multiple (rtx Rb, rtx Re, rtx En4)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -654,7 +653,7 @@ nds32_emit_stack_pop_multiple (rtx Rb, rtx Re, rtx En4)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -668,7 +667,7 @@ nds32_emit_stack_pop_multiple (rtx Rb, rtx Re, rtx En4)
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -681,8 +680,7 @@ nds32_emit_stack_pop_multiple (rtx Rb, rtx Re, rtx En4)
/* The offset value is already in place. No need to re-calculate it. */
adjust_sp_rtx
- = gen_rtx_SET (VOIDmode,
- stack_pointer_rtx,
+ = gen_rtx_SET (stack_pointer_rtx,
plus_constant (Pmode, stack_pointer_rtx, offset));
XVECEXP (parallel_insn, 0, par_index) = adjust_sp_rtx;
@@ -766,7 +764,7 @@ nds32_emit_stack_v3push (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -778,7 +776,7 @@ nds32_emit_stack_v3push (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -788,7 +786,7 @@ nds32_emit_stack_v3push (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -798,7 +796,7 @@ nds32_emit_stack_v3push (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- push_rtx = gen_rtx_SET (VOIDmode, mem, reg);
+ push_rtx = gen_rtx_SET (mem, reg);
XVECEXP (parallel_insn, 0, par_index) = push_rtx;
RTX_FRAME_RELATED_P (push_rtx) = 1;
offset = offset + 4;
@@ -809,8 +807,7 @@ nds32_emit_stack_v3push (rtx Rb,
/* We need to re-calculate the offset value again for adjustment. */
offset = -(num_use_regs * 4);
adjust_sp_rtx
- = gen_rtx_SET (VOIDmode,
- stack_pointer_rtx,
+ = gen_rtx_SET (stack_pointer_rtx,
plus_constant (Pmode,
stack_pointer_rtx,
offset - INTVAL (imm8u)));
@@ -892,7 +889,7 @@ nds32_emit_stack_v3pop (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -906,7 +903,7 @@ nds32_emit_stack_v3pop (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -918,7 +915,7 @@ nds32_emit_stack_v3pop (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -930,7 +927,7 @@ nds32_emit_stack_v3pop (rtx Rb,
mem = gen_frame_mem (SImode, plus_constant (Pmode,
stack_pointer_rtx,
offset));
- pop_rtx = gen_rtx_SET (VOIDmode, reg, mem);
+ pop_rtx = gen_rtx_SET (reg, mem);
XVECEXP (parallel_insn, 0, par_index) = pop_rtx;
RTX_FRAME_RELATED_P (pop_rtx) = 1;
offset = offset + 4;
@@ -941,8 +938,7 @@ nds32_emit_stack_v3pop (rtx Rb,
/* The offset value is already in place. No need to re-calculate it. */
adjust_sp_rtx
- = gen_rtx_SET (VOIDmode,
- stack_pointer_rtx,
+ = gen_rtx_SET (stack_pointer_rtx,
plus_constant (Pmode,
stack_pointer_rtx,
offset + INTVAL (imm8u)));
@@ -1019,7 +1015,7 @@ nds32_force_addi_stack_int (int full_value)
rtx set_rtx;
plus_rtx = plus_constant (Pmode, stack_pointer_rtx, full_value);
- set_rtx = gen_rtx_SET (VOIDmode, stack_pointer_rtx, plus_rtx);
+ set_rtx = gen_rtx_SET (stack_pointer_rtx, plus_rtx);
add_reg_note (sp_adjust_insn, REG_FRAME_RELATED_EXPR, set_rtx);
RTX_FRAME_RELATED_P (sp_adjust_insn) = 1;