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authorlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>1999-08-25 08:21:46 +0000
committerlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>1999-08-25 08:21:46 +0000
commitd93cb711178b067014a59ed96f4a4349987f1ba4 (patch)
tree8c8efe8c50b6f7e339038dc58cd5a032218a1826 /gcc/config/ns32k/ns32k.md
parentbb55524f6f742883baabdcf585617ee24d442c6a (diff)
downloadgcc-d93cb711178b067014a59ed96f4a4349987f1ba4.tar.gz
Fix typo.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@28852 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ns32k/ns32k.md')
-rw-r--r--gcc/config/ns32k/ns32k.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md
index 69ba564638b..c5fe1602b43 100644
--- a/gcc/config/ns32k/ns32k.md
+++ b/gcc/config/ns32k/ns32k.md
@@ -1335,7 +1335,7 @@
DONE;
}")
-;; deiw wants two hi's in seperate registers or else they can be adjacent
+;; deiw wants two hi's in separate registers or else they can be adjacent
;; in memory. DI mode will ensure two registers are available, but if we
;; want to allow memory as an operand we would need SI mode. There is no
;; way to do this, so just restrict operand 0 and 1 to be in registers.
@@ -1392,7 +1392,7 @@
DONE;
}")
-;; deib wants two qi's in seperate registers or else they can be adjacent
+;; deib wants two qi's in separate registers or else they can be adjacent
;; in memory. DI mode will ensure two registers are available, but if we
;; want to allow memory as an operand we would need HI mode. There is no
;; way to do this, so just restrict operand 0 and 1 to be in registers.