diff options
| author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-07-05 00:08:11 +0000 |
|---|---|---|
| committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-07-05 00:08:11 +0000 |
| commit | 2cecd77238ad26dc46a98f2dcd7a813c5a0a0556 (patch) | |
| tree | cd5de58afed9165c3e3dcbf71dcb4cb9920b7829 /gcc/config/pa/pa.c | |
| parent | 56735f3953f6191c1b7fbe180b03891e11d2b02c (diff) | |
| download | gcc-2cecd77238ad26dc46a98f2dcd7a813c5a0a0556.tar.gz | |
* config/pa/fptr.c: Fix comment typos.
* config/pa/pa-64.h: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa.h: Likewise.
* config/rs6000/603.md: Likewise.
* config/rs6000/7xx.md: Likewise.
* config/rs6000/darwin.h: Likewise.
* config/rs6000/freebsd.h: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rs6000/rs6000.md: Likewise.
* config/rs6000/spe.h: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@68947 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa/pa.c')
| -rw-r--r-- | gcc/config/pa/pa.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index e7b0b8abbe2..9287583bd7d 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -1467,7 +1467,7 @@ force_mode (mode, orig) normally. Note SCRATCH_REG may not be in the proper mode depending on how it - will be used. This routine is resposible for creating a new copy + will be used. This routine is responsible for creating a new copy of SCRATCH_REG in the proper mode. */ int @@ -7585,7 +7585,7 @@ pa_function_ok_for_sibcall (decl, exp) return (decl != NULL_TREE); /* Sibcalls are not ok because the arg pointer register is not a fixed - register. This prevents the sibcall optimization from occuring. In + register. This prevents the sibcall optimization from occurring. In addition, there are problems with stub placement using GNU ld. This is because a normal sibcall branch uses a 17-bit relocation while a regular call branch uses a 22-bit relocation. As a result, more @@ -8641,7 +8641,7 @@ function_arg (cum, mode, type, named) This is magic. Normally, using a PARALLEL results in left justified data on a big-endian target. However, using a single double-word register provides the required right - justication for 5 to 8 byte structures. This has nothing + justification for 5 to 8 byte structures. This has nothing to do with the direction of padding specified for the argument. It has to do with how the data is widened and shifted into and from the register. |