diff options
| author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-09-09 15:57:43 +0000 |
|---|---|---|
| committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-09-09 15:57:43 +0000 |
| commit | eacbf1cd3aff3dbf47a71dc7fdb1d01dce8e777e (patch) | |
| tree | 1bfb594134ffebca206d3ed2fe55693634759c1d /gcc/config/pa/pa.md | |
| parent | 11fd42e7594bdb9c8d9cf10f9924cb8644752b78 (diff) | |
| download | gcc-eacbf1cd3aff3dbf47a71dc7fdb1d01dce8e777e.tar.gz | |
2013-09-09 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 202389 using svnmerge.py; notice
that gcc/melt/xtramelt-ana-base.melt has been significantly
updated, but some updates are yet missing...
[gcc/]
2013-09-09 Basile Starynkevitch <basile@starynkevitch.net>
{{When merging trunk GCC 4.9 with C++ passes}}
* melt/xtramelt-ana-base.melt: Add GCC 4.9 specific code, still
incomplete, for classy passes.... Only Gimple passes are yet possible...
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@202408 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa/pa.md')
| -rw-r--r-- | gcc/config/pa/pa.md | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index be07d2a229a..80c4d43401d 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -833,7 +833,7 @@ (define_insn "scc" [(set (match_operand:SI 0 "register_operand" "=r") (match_operator:SI 3 "comparison_operator" - [(match_operand:SI 1 "register_operand" "r") + [(match_operand:SI 1 "reg_or_0_operand" "rM") (match_operand:SI 2 "arith11_operand" "rI")]))] "" "{com%I2clr|cmp%I2clr},%B3 %2,%1,%0\;ldi 1,%0" @@ -843,7 +843,7 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") (match_operator:DI 3 "comparison_operator" - [(match_operand:DI 1 "register_operand" "r") + [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith11_operand" "rI")]))] "TARGET_64BIT" "cmp%I2clr,*%B3 %2,%1,%0\;ldi 1,%0" @@ -853,10 +853,10 @@ (define_insn "iorscc" [(set (match_operand:SI 0 "register_operand" "=r") (ior:SI (match_operator:SI 3 "comparison_operator" - [(match_operand:SI 1 "register_operand" "r") + [(match_operand:SI 1 "reg_or_0_operand" "rM") (match_operand:SI 2 "arith11_operand" "rI")]) (match_operator:SI 6 "comparison_operator" - [(match_operand:SI 4 "register_operand" "r") + [(match_operand:SI 4 "reg_or_0_operand" "rM") (match_operand:SI 5 "arith11_operand" "rI")])))] "" "{com%I2clr|cmp%I2clr},%S3 %2,%1,%%r0\;{com%I5clr|cmp%I5clr},%B6 %5,%4,%0\;ldi 1,%0" @@ -866,10 +866,10 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") (ior:DI (match_operator:DI 3 "comparison_operator" - [(match_operand:DI 1 "register_operand" "r") + [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith11_operand" "rI")]) (match_operator:DI 6 "comparison_operator" - [(match_operand:DI 4 "register_operand" "r") + [(match_operand:DI 4 "reg_or_0_operand" "rM") (match_operand:DI 5 "arith11_operand" "rI")])))] "TARGET_64BIT" "cmp%I2clr,*%S3 %2,%1,%%r0\;cmp%I5clr,*%B6 %5,%4,%0\;ldi 1,%0" @@ -881,7 +881,7 @@ (define_insn "negscc" [(set (match_operand:SI 0 "register_operand" "=r") (neg:SI (match_operator:SI 3 "comparison_operator" - [(match_operand:SI 1 "register_operand" "r") + [(match_operand:SI 1 "reg_or_0_operand" "rM") (match_operand:SI 2 "arith11_operand" "rI")])))] "" "{com%I2clr|cmp%I2clr},%B3 %2,%1,%0\;ldi -1,%0" @@ -891,7 +891,7 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") (neg:DI (match_operator:DI 3 "comparison_operator" - [(match_operand:DI 1 "register_operand" "r") + [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith11_operand" "rI")])))] "TARGET_64BIT" "cmp%I2clr,*%B3 %2,%1,%0\;ldi -1,%0" |