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author | danglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-01-28 18:48:11 +0000 |
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committer | danglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-01-28 18:48:11 +0000 |
commit | 16309feffa5946f02e6b824bdf7620eaa1483077 (patch) | |
tree | 1c3072dfac6526fcddc905b0f90a27f2c68c4462 /gcc/config/pa | |
parent | c595ed2fe048473a55e9c4b6159f96ed06a026d3 (diff) | |
download | gcc-16309feffa5946f02e6b824bdf7620eaa1483077.tar.gz |
PR target/51871
* config/pa/pa.c (pa_return_addr_rtx): Add support for PA2.0 export
stubs.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183669 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa')
-rw-r--r-- | gcc/config/pa/pa.c | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 9b1a6578201..bcf64ce82a5 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -4501,7 +4501,7 @@ pa_return_addr_rtx (int count, rtx frameaddr) rtx saved_rp; rtx ins; - /* Instruction stream at the normal return address for the export stub: + /* The instruction stream at the return address of a PA1.X export stub is: 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp 0x004010a1 | stub+12: ldsid (sr0,rp),r1 @@ -4509,10 +4509,16 @@ pa_return_addr_rtx (int count, rtx frameaddr) 0xe0400002 | stub+20: be,n 0(sr0,rp) 0xe0400002 must be specified as -532676606 so that it won't be - rejected as an invalid immediate operand on 64-bit hosts. */ + rejected as an invalid immediate operand on 64-bit hosts. - HOST_WIDE_INT insns[4] = {0x4bc23fd1, 0x004010a1, 0x00011820, -532676606}; - int i; + The instruction stream at the return address of a PA2.0 export stub is: + + 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp + 0xe840d002 | stub+12: bve,n (rp) + */ + + HOST_WIDE_INT insns[4]; + int i, len; if (count != 0) return NULL_RTX; @@ -4535,11 +4541,26 @@ pa_return_addr_rtx (int count, rtx frameaddr) ins = copy_to_reg (gen_rtx_AND (Pmode, rp, MASK_RETURN_ADDR)); label = gen_label_rtx (); + if (TARGET_PA_20) + { + insns[0] = 0x4bc23fd1; + insns[1] = -398405630; + len = 2; + } + else + { + insns[0] = 0x4bc23fd1; + insns[1] = 0x004010a1; + insns[2] = 0x00011820; + insns[3] = -532676606; + len = 4; + } + /* Check the instruction stream at the normal return address for the export stub. If it is an export stub, than our return address is really in -24[frameaddr]. */ - for (i = 0; i < 3; i++) + for (i = 0; i < len; i++) { rtx op0 = gen_rtx_MEM (SImode, plus_constant (ins, i * 4)); rtx op1 = GEN_INT (insns[i]); |