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author | Segher Boessenkool <segher@kernel.crashing.org> | 2014-12-10 19:30:07 +0100 |
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committer | Segher Boessenkool <segher@gcc.gnu.org> | 2014-12-10 19:30:07 +0100 |
commit | 76f93d9994a39b1631bea983cfebf3e9a48c4288 (patch) | |
tree | f229917c276a31eb88b196c835c8e817c159406b /gcc/config/rs6000/darwin.md | |
parent | 7b7817713f7bd37c78b9c0bd5747579aa80f6245 (diff) | |
download | gcc-76f93d9994a39b1631bea983cfebf3e9a48c4288.tar.gz |
re PR target/64180 (PowerPC carry bit improvements)
PR target/64180
* config/rs6000/darwin.md (macho_low_si): Remove "r" alternative.
(macho_low_di): Ditto.
* config/rs6000/rs6000.md (*largetoc_low): Ditto.
(tocref<mode>): Ditto.
(elf_low): Ditto.
* config/rs6000/spe.md (mov_si<mode>_e500_subreg0_elf_low_be): Ditto.
(mov_si<mode>_e500_subreg0_elf_low_le): Ditto.
(mov_si<mode>_e500_subreg4_elf_low_be): Ditto. Reformat condition.
(mov_si<mode>_e500_subreg4_elf_low_le): Ditto.
From-SVN: r218590
Diffstat (limited to 'gcc/config/rs6000/darwin.md')
-rw-r--r-- | gcc/config/rs6000/darwin.md | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/gcc/config/rs6000/darwin.md b/gcc/config/rs6000/darwin.md index 8b816b7a81d..764f847b26c 100644 --- a/gcc/config/rs6000/darwin.md +++ b/gcc/config/rs6000/darwin.md @@ -213,22 +213,18 @@ You should have received a copy of the GNU General Public License }) (define_insn "macho_low_si" - [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r") - (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,!*r") + [(set (match_operand:SI 0 "gpc_reg_operand" "=r") + (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b") (match_operand 2 "" "")))] "TARGET_MACHO && ! TARGET_64BIT" - "@ - la %0,lo16(%2)(%1) - addic %0,%1,lo16(%2)") + "la %0,lo16(%2)(%1)") (define_insn "macho_low_di" - [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") - (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,!*r") + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b") (match_operand 2 "" "")))] "TARGET_MACHO && TARGET_64BIT" - "@ - la %0,lo16(%2)(%1) - addic %0,%1,lo16(%2)") + "la %0,lo16(%2)(%1)") (define_split [(set (mem:V4SI (plus:DI (match_operand:DI 0 "gpc_reg_operand" "") |