diff options
| author | jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-01-02 13:08:01 +0000 |
|---|---|---|
| committer | jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-01-02 13:08:01 +0000 |
| commit | 7c69b636e86fa2d36a731fd25aafc6fa797686d3 (patch) | |
| tree | a43dd513ab6ec2603c9b5a9ca0558bfa7bfb29b1 /gcc/config/rs6000/e500.h | |
| parent | b120cdbcbd332f41b9445990c6c9fcd5b7facd81 (diff) | |
| download | gcc-7c69b636e86fa2d36a731fd25aafc6fa797686d3.tar.gz | |
* config.gcc (powerpc-*-eabispe*, powerpc-*-eabisimaltivec*,
powerpc-*-eabisim*, powerpc-*-eabialtivec*, powerpc-*-eabi*,
powerpc-*-rtems*, powerpc-wrs-vxworks, powerpc-wrs-vxworksae,
powerpcle-*-eabisim*, powerpcle-*-eabi*): Add rs6000/e500.h to
tm_file.
* config/rs6000/e500.h: New.
* config/rs6000/eabi.h (TARGET_SPE_ABI, TARGET_SPE, TARGET_E500,
TARGET_ISEL, TARGET_FPRS, TARGET_E500_SINGLE, TARGET_E500_DOUBLE):
Remove.
* config/rs6000/linuxspe.h (TARGET_SPE_ABI, TARGET_SPE,
TARGET_E500, TARGET_ISEL, TARGET_FPRS, TARGET_E500_SINGLE,
TARGET_E500_DOUBLE): Remove.
* config/rs6000/vxworks.h (TARGET_SPE_ABI, TARGET_SPE,
TARGET_E500, TARGET_ISEL, TARGET_FPRS): Remove.
* config/rs6000/rs6000.h (CHECK_E500_OPTIONS): Define.
* config/rs6000/rs6000.c (rs6000_override_options): Use
CHECK_E500_OPTIONS.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@120340 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/e500.h')
| -rw-r--r-- | gcc/config/rs6000/e500.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/gcc/config/rs6000/e500.h b/gcc/config/rs6000/e500.h new file mode 100644 index 00000000000..8296f45d1a3 --- /dev/null +++ b/gcc/config/rs6000/e500.h @@ -0,0 +1,48 @@ +/* Enable E500 support. + Copyright (C) 2003, 2004, 2006, 2007 Free Software Foundation, Inc. + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 2, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING. If not, write to the + Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#undef TARGET_SPE_ABI +#undef TARGET_SPE +#undef TARGET_E500 +#undef TARGET_ISEL +#undef TARGET_FPRS +#undef TARGET_E500_SINGLE +#undef TARGET_E500_DOUBLE +#undef CHECK_E500_OPTIONS + +#define TARGET_SPE_ABI rs6000_spe_abi +#define TARGET_SPE rs6000_spe +#define TARGET_E500 (rs6000_cpu == PROCESSOR_PPC8540) +#define TARGET_ISEL rs6000_isel +#define TARGET_FPRS (rs6000_float_gprs == 0) +#define TARGET_E500_SINGLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 1) +#define TARGET_E500_DOUBLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 2) +#define CHECK_E500_OPTIONS \ + do { \ + if (TARGET_E500 || TARGET_SPE || TARGET_SPE_ABI || TARGET_ISEL \ + || TARGET_E500_SINGLE || TARGET_E500_DOUBLE) \ + { \ + if (TARGET_ALTIVEC) \ + error ("AltiVec and E500 instructions cannot coexist"); \ + if (TARGET_64BIT) \ + error ("64-bit E500 not supported"); \ + if (TARGET_HARD_FLOAT && TARGET_FPRS) \ + error ("E500 and FPRs not supported"); \ + } \ + } while (0) |