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authormeissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>2013-05-04 05:38:47 +0000
committermeissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>2013-05-04 05:38:47 +0000
commit21e5dc0169f0dbd2485f7536ebfda8401c4b76c9 (patch)
tree33ebf64e84aca3b4d16f51cc4c5b88e76ed4106f /gcc/config/rs6000/rs6000.c
parente64c90eb86152530ec555c398acc701104df38f2 (diff)
downloadgcc-21e5dc0169f0dbd2485f7536ebfda8401c4b76c9.tar.gz
[gcc]
2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/57150 * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode to save TFmode registers and DImode to save TImode registers for caller save operations. (HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to mark being partially clobbered since they only use the first double word. * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode and TDmode only use the upper 64-bits of each VSX register. [gcc/testsuite] 2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/57150 * gcc.target/powerpc/pr57150.c: New file. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198593 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000.c')
-rw-r--r--gcc/config/rs6000/rs6000.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 7c329754482..4f7fc70d566 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -2335,8 +2335,16 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
reg_size = UNITS_PER_WORD;
for (m = 0; m < NUM_MACHINE_MODES; ++m)
- rs6000_class_max_nregs[m][c]
- = (GET_MODE_SIZE (m) + reg_size - 1) / reg_size;
+ {
+ int reg_size2 = reg_size;
+
+ /* TFmode/TDmode always takes 2 registers, even in VSX. */
+ if (m == TDmode || m == TFmode)
+ reg_size2 = UNITS_PER_FP_WORD;
+
+ rs6000_class_max_nregs[m][c]
+ = (GET_MODE_SIZE (m) + reg_size2 - 1) / reg_size2;
+ }
}
if (TARGET_E500_DOUBLE)