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author | amodra <amodra@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-06-13 03:22:20 +0000 |
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committer | amodra <amodra@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-06-13 03:22:20 +0000 |
commit | 74a1167ab61730977d56fb65bd106183f6570e8a (patch) | |
tree | 334dcd6992f032c9ccae0cee61d50184e161e593 /gcc/config/rs6000/spe.md | |
parent | bf9c2a9359ca41079e9a4c6ed0ad3cee3c76b325 (diff) | |
download | gcc-74a1167ab61730977d56fb65bd106183f6570e8a.tar.gz |
* config/rs6000/rs6000.h (LONG_DOUBLE_LARGE_FIRST): Define.
* config/rs6000/rs6000.md (signbittf2): New insn.
(extenddftf2_internal): Use LONG_DOUBLE_LARGE_FIRST.
(abstf2_internal, cmptf_internal2): Likewise.
* config/rs6000/spe.md (spe_abstf2_cmp, spe_abstf2_tst): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200055 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/spe.md')
-rw-r--r-- | gcc/config/rs6000/spe.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index cec2b430b82..bf10a5dc180 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -2604,8 +2604,8 @@ && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128" " { - const int hi_word = FLOAT_WORDS_BIG_ENDIAN ? 0 : GET_MODE_SIZE (DFmode); - const int lo_word = FLOAT_WORDS_BIG_ENDIAN ? GET_MODE_SIZE (DFmode) : 0; + const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode); + const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0; operands[3] = gen_reg_rtx (DFmode); operands[4] = gen_reg_rtx (CCFPmode); operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word); @@ -2627,8 +2627,8 @@ && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128" " { - const int hi_word = FLOAT_WORDS_BIG_ENDIAN ? 0 : GET_MODE_SIZE (DFmode); - const int lo_word = FLOAT_WORDS_BIG_ENDIAN ? GET_MODE_SIZE (DFmode) : 0; + const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode); + const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0; operands[3] = gen_reg_rtx (DFmode); operands[4] = gen_reg_rtx (CCFPmode); operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word); |