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| author | segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-07 22:00:58 +0000 |
|---|---|---|
| committer | segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-07 22:00:58 +0000 |
| commit | 631c977b56234aef7d6242d09924f5a0a081cc64 (patch) | |
| tree | cd8a170e4a1bf065792be21e8461f7608f25a897 /gcc/config/rs6000/titan.md | |
| parent | a3ba513eef70417cc12a3cf01f8dc092162aa78b (diff) | |
| download | gcc-631c977b56234aef7d6242d09924f5a0a081cc64.tar.gz | |
rs6000: New attributes for load/store: "sign_extend", "update" and "indexed"
The new attributes replace the instruction types *_ext*, *_u, *_ux.
This simplifies all code that does not care about the addressing modes,
putting the burden on the code that does care (mostly the scheduling
descriptions for certain CPUs).
It fixes a few minor bugs in the process.
The "update" and "indexed" attributes are automatic for any insn that
has a MEM as operand 0 or 1. Other insns have to set it manually, if
they do not like the default (which is "no"). Insns that are type
load/store/fpload/fpstore but have fewer than two operands need to set
it too, or the compiler will crash. There are very few of those.
This tries not to change semantics anywhere; in particular, the string
and multiple instructions set both "update" and "indexed" (although
they are neither).
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210190 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/titan.md')
| -rw-r--r-- | gcc/config/rs6000/titan.md | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/gcc/config/rs6000/titan.md b/gcc/config/rs6000/titan.md index c0c3155e4a9..1adbee58fff 100644 --- a/gcc/config/rs6000/titan.md +++ b/gcc/config/rs6000/titan.md @@ -95,13 +95,12 @@ ;; Loads. (define_insn_reservation "titan_lsu_load" 3 - (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ - load_l,sync") + (and (eq_attr "type" "load,load_l,sync") (eq_attr "cpu" "titan")) "titan_issue,titan_lsu_sh") (define_insn_reservation "titan_lsu_fpload" 12 - (and (eq_attr "type" "fpload,fpload_ux,fpload_u") + (and (eq_attr "type" "fpload") (eq_attr "cpu" "titan")) "titan_issue,titan_lsu_sh") @@ -115,12 +114,12 @@ ;; Stores. (define_insn_reservation "titan_lsu_store" 12 - (and (eq_attr "type" "store,store_ux,store_u,store_c") + (and (eq_attr "type" "store,store_c") (eq_attr "cpu" "titan")) "titan_issue,titan_lsu_sh") (define_insn_reservation "titan_lsu_fpstore" 12 - (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u") + (and (eq_attr "type" "fpstore") (eq_attr "cpu" "titan")) "titan_issue,titan_lsu_sh") |