contrib:

	* gcc_update (gcc/config/rs6000/rs6000-tables.opt): New
	dependencies.

gcc:
	* config/rs6000/genopt.sh, config/rs6000/rs6000-cpus.def: New
	files.
	* config/rs6000/rs6000-tables.opt: New file (generated).
	* config.gcc (powerpc*-*-*, rs6000*-*-*): Add
	rs6000/rs6000-tables.opt to extra_options.
	* config/rs6000/rs6000-opts.h (RS6000_CPU_OPTION_NATIVE): Define.
	* config/rs6000/rs6000.c (rs6000_select): Remove.
	(processor_target_table): Move contents to rs6000-cpus.def.
	(darwin_rs6000_override_options): Check
	global_options_set.x_rs6000_cpu_index instead of
	rs6000_select[1].string.
	(rs6000_option_override_internal): Likewise.
	(rs6000_handle_option): Don't assert that global structures are in
	use.  Don't handle OPT_mcpu_ and OPT_mtune_ here.
	(rs6000_default_cpu): New variable.
	(rs6000_file_start): Set it instead of local default_cpu.  Check
	rs6000_default_cpu, global_options_set.x_rs6000_cpu_index and
	global_options_set.x_rs6000_tune_index instead of rs6000_select.
	(rs6000_darwin_file_start): Check rs6000_default_cpu and
	global_options_set.x_rs6000_cpu_index instead of rs6000_select.
	* config/rs6000/rs6000.h (struct rs6000_cpu_select,
	rs6000_select): Remove.
	* config/rs6000/rs6000.opt (rs6000_cpu_index, rs6000_tune_index):
	Remove.
	(mcpu=, mtune=): Use Var, Init, Enum and Save.
	* config/rs6000/t-rs6000
	($(srcdir)/config/rs6000/rs6000-tables.opt): New.
	* config/rs6000/eabispe.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Check
	global_options_set.x_rs6000_cpu_index instead of
	rs6000_select[1].string.
	* config/rs6000/linuxspe.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Check
	global_options_set.x_rs6000_cpu_index instead of
	rs6000_select[1].string.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@173620 138bc75d-0d04-0410-961f-82ee72b054a4

10 files changed, 458 insertions, 181 deletions

diff --git a/gcc/config/rs6000/eabispe.h b/gcc/config/rs6000/eabispe.h
index f0b3a32f296..19f24726c2e 100644
--- a/gcc/config/rs6000/eabispe.h
+++ b/gcc/config/rs6000/eabispe.h
@@ -26,7 +26,7 @@
 
 #undef  SUBSUBTARGET_OVERRIDE_OPTIONS
 #define SUBSUBTARGET_OVERRIDE_OPTIONS \
-  if (rs6000_select[1].string == NULL) \
+  if (!global_options_set.x_rs6000_cpu_index) \
     rs6000_cpu = PROCESSOR_PPC8540; \
   if (!global_options_set.x_rs6000_spe_abi) \
     rs6000_spe_abi = 1; \
diff --git a/gcc/config/rs6000/genopt.sh b/gcc/config/rs6000/genopt.sh
new file mode 100755
index 00000000000..be87ff50d66
--- /dev/null
+++ b/gcc/config/rs6000/genopt.sh
@@ -0,0 +1,64 @@
+#!/bin/sh
+# Generate rs6000-tables.opt from the list of CPUs in rs6000-cpus.def.
+# Copyright (C) 2011 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+cat <<EOF
+; -*- buffer-read-only: t -*-
+; Generated automatically by genopt.sh from rs6000-cpus.def.
+
+; Copyright (C) 2011 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+
+Enum
+Name(rs6000_cpu_opt_value) Type(int)
+Known CPUs (for use with the -mcpu= and -mtune= options):
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(native) Value(RS6000_CPU_OPTION_NATIVE) DriverOnly
+
+EOF
+
+awk -F'[(, 	]+' '
+BEGIN {
+    value = 0
+}
+
+/^RS6000_CPU/ {
+    name = $2
+    gsub("\"", "", name)
+    print "EnumValue"
+    print "Enum(rs6000_cpu_opt_value) String(" name ") Value(" value ")"
+    print ""
+    value++
+}' $1/rs6000-cpus.def
diff --git a/gcc/config/rs6000/linuxspe.h b/gcc/config/rs6000/linuxspe.h
index a5d048cca79..8b95d25ff5b 100644
--- a/gcc/config/rs6000/linuxspe.h
+++ b/gcc/config/rs6000/linuxspe.h
@@ -26,7 +26,7 @@
 
 #undef  SUBSUBTARGET_OVERRIDE_OPTIONS
 #define SUBSUBTARGET_OVERRIDE_OPTIONS \
-  if (rs6000_select[1].string == NULL) \
+  if (!global_options_set.x_rs6000_cpu_index) \
     rs6000_cpu = PROCESSOR_PPC8540; \
   if (!global_options_set.x_rs6000_spe_abi) \
     rs6000_spe_abi = 1; \
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
new file mode 100644
index 00000000000..5da8917c440
--- /dev/null
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -0,0 +1,140 @@
+/* IBM RS/6000 CPU names..
+   Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+   Free Software Foundation, Inc.
+   Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This table occasionally claims that a processor does not support a
+   particular feature even though it does, but the feature is slower than the
+   alternative.  Thus, it shouldn't be relied on as a complete description of
+   the processor's support.
+
+   Please keep this list in order, and don't forget to update the documentation
+   in invoke.texi when adding a new processor or flag.
+
+   Before including this file, define a macro:
+
+   RS6000_CPU (NAME, CPU, FLAGS)
+
+   where the arguments are the fields of struct rs6000_ptt.  */
+
+RS6000_CPU ("401", PROCESSOR_PPC403, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("403", PROCESSOR_PPC403,
+	    POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_STRICT_ALIGN)
+RS6000_CPU ("405", PROCESSOR_PPC405,
+	    POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("405fp", PROCESSOR_PPC405,
+	    POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("440", PROCESSOR_PPC440,
+	    POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("440fp", PROCESSOR_PPC440,
+	    POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("464", PROCESSOR_PPC440,
+	    POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("464fp", PROCESSOR_PPC440,
+	    POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("476", PROCESSOR_PPC476,
+	    POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_PPC_GFXOPT | MASK_MFCRF
+	    | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("476fp", PROCESSOR_PPC476,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB
+	    | MASK_FPRND | MASK_CMPB | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("505", PROCESSOR_MPCCORE, POWERPC_BASE_MASK)
+RS6000_CPU ("601", PROCESSOR_PPC601,
+	    MASK_POWER | POWERPC_BASE_MASK | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("602", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("603", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("603e", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("604", PROCESSOR_PPC604, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("604e", PROCESSOR_PPC604e, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("620", PROCESSOR_PPC620,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("630", PROCESSOR_PPC630,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("740", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("7400", PROCESSOR_PPC7400, POWERPC_7400_MASK)
+RS6000_CPU ("7450", PROCESSOR_PPC7450, POWERPC_7400_MASK)
+RS6000_CPU ("750", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("801", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("821", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("823", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN
+	    | MASK_ISEL)
+/* 8548 has a dummy entry for now.  */
+RS6000_CPU ("8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN
+	    | MASK_ISEL)
+RS6000_CPU ("a2", PROCESSOR_PPCA2,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_POPCNTB
+	    | MASK_CMPB | MASK_NO_UPDATE)
+RS6000_CPU ("e300c2", PROCESSOR_PPCE300C2, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("e300c3", PROCESSOR_PPCE300C3, POWERPC_BASE_MASK)
+RS6000_CPU ("e500mc", PROCESSOR_PPCE500MC, POWERPC_BASE_MASK | MASK_PPC_GFXOPT
+	    | MASK_ISEL)
+RS6000_CPU ("e500mc64", PROCESSOR_PPCE500MC64,
+	    POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GFXOPT | MASK_ISEL)
+RS6000_CPU ("860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("970", PROCESSOR_POWER4,
+	    POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64)
+RS6000_CPU ("cell", PROCESSOR_CELL,
+	    POWERPC_7400_MASK  | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64)
+RS6000_CPU ("common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS)
+RS6000_CPU ("ec603e", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_SOFT_FLOAT)
+RS6000_CPU ("G3", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT)
+RS6000_CPU ("G4",  PROCESSOR_PPC7450, POWERPC_7400_MASK)
+RS6000_CPU ("G5", PROCESSOR_POWER4,
+	    POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64)
+RS6000_CPU ("titan", PROCESSOR_TITAN,
+	    POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB)
+RS6000_CPU ("power", PROCESSOR_POWER, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("power2", PROCESSOR_POWER,
+	    MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("power3", PROCESSOR_PPC630,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("power4", PROCESSOR_POWER4,
+	    POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT
+	    | MASK_PPC_GFXOPT | MASK_MFCRF)
+RS6000_CPU ("power5", PROCESSOR_POWER5,
+	    POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT
+	    | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB)
+RS6000_CPU ("power5+", PROCESSOR_POWER5,
+	    POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT
+	    | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND)
+RS6000_CPU ("power6", PROCESSOR_POWER6,
+	    POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT
+	    | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND
+	    | MASK_CMPB | MASK_DFP | MASK_RECIP_PRECISION)
+RS6000_CPU ("power6x", PROCESSOR_POWER6,
+	    POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT
+	    | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND
+	    | MASK_CMPB | MASK_DFP | MASK_MFPGPR | MASK_RECIP_PRECISION)
+RS6000_CPU ("power7", PROCESSOR_POWER7,   /* Don't add MASK_ISEL by default */
+	    POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
+	    | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
+	    | MASK_VSX | MASK_RECIP_PRECISION)
+RS6000_CPU ("powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK)
+RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("rios", PROCESSOR_RIOS1, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("rios1", PROCESSOR_RIOS1, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("rios2", PROCESSOR_RIOS2,
+	    MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("rsc", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("rsc1", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
+RS6000_CPU ("rs64", PROCESSOR_RS64A,
+	    POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 542fea79013..ea7e7c74f60 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -1,6 +1,6 @@
 /* Definitions of target machine needed for option handling for GNU compiler,
    for IBM RS/6000.
-   Copyright (C) 2010
+   Copyright (C) 2010, 2011
    Free Software Foundation, Inc.
    Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
 
@@ -141,4 +141,9 @@ enum rs6000_vector {
   VECTOR_OTHER			/* Some other vector unit */
 };
 
+/* No enumeration is defined to index the -mcpu= values (entries in
+   processor_target_table), with the type int being used instead, but
+   we need to distinguish the special "native" value.  */
+#define RS6000_CPU_OPTION_NATIVE -1
+
 #endif
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
new file mode 100644
index 00000000000..91341e6cc3b
--- /dev/null
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -0,0 +1,205 @@
+; -*- buffer-read-only: t -*-
+; Generated automatically by genopt.sh from rs6000-cpus.def.
+
+; Copyright (C) 2011 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+
+Enum
+Name(rs6000_cpu_opt_value) Type(int)
+Known CPUs (for use with the -mcpu= and -mtune= options):
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(native) Value(RS6000_CPU_OPTION_NATIVE) DriverOnly
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(401) Value(0)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(403) Value(1)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(405) Value(2)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(405fp) Value(3)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(440) Value(4)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(440fp) Value(5)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(464) Value(6)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(464fp) Value(7)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(476) Value(8)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(476fp) Value(9)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(505) Value(10)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(601) Value(11)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(602) Value(12)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(603) Value(13)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(603e) Value(14)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(604) Value(15)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(604e) Value(16)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(620) Value(17)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(630) Value(18)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(740) Value(19)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(7400) Value(20)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(7450) Value(21)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(750) Value(22)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(801) Value(23)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(821) Value(24)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(823) Value(25)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(8540) Value(26)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(8548) Value(27)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(a2) Value(28)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(e300c2) Value(29)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(e300c3) Value(30)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(e500mc) Value(31)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(e500mc64) Value(32)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(860) Value(33)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(970) Value(34)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(cell) Value(35)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(common) Value(36)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(ec603e) Value(37)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(G3) Value(38)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(G4) Value(39)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(G5) Value(40)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(titan) Value(41)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power) Value(42)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power2) Value(43)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power3) Value(44)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power4) Value(45)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power5) Value(46)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power5+) Value(47)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power6) Value(48)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power6x) Value(49)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power7) Value(50)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(51)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(52)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rios) Value(53)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rios1) Value(54)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rios2) Value(55)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rsc) Value(56)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rsc1) Value(57)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(58)
+
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ac25e29f810..12db94e65d5 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -138,16 +138,6 @@ typedef struct GTY(()) machine_function
   rtx sdmode_stack_slot;
 } machine_function;
 
-/* Target cpu type */
-
-struct rs6000_cpu_select rs6000_select[3] =
-{
-  /* switch		name,			tune	arch */
-  { (const char *)0,	"--with-cpu=",		1,	1 },
-  { (const char *)0,	"-mcpu=",		1,	1 },
-  { (const char *)0,	"-mtune=",		1,	0 },
-};
-
 /* Support targetm.vectorize.builtin_mask_for_load.  */
 static GTY(()) tree altivec_builtin_mask_for_load;
 
@@ -1697,14 +1687,6 @@ enum {
 			  | MASK_VSX)
 };
 
-/* This table occasionally claims that a processor does not support a
-   particular feature even though it does, but the feature is slower than the
-   alternative.  Thus, it shouldn't be relied on as a complete description of
-   the processor's support.
-
-   Please keep this list in order, and don't forget to update the documentation
-   in invoke.texi when adding a new processor or flag.  */
-
 struct rs6000_ptt
 {
   const char *const name;		/* Canonical processor name.  */
@@ -1714,110 +1696,9 @@ struct rs6000_ptt
 
 static struct rs6000_ptt const processor_target_table[] =
 {
-  {"401", PROCESSOR_PPC403, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"403", PROCESSOR_PPC403,
-   POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_STRICT_ALIGN},
-  {"405", PROCESSOR_PPC405,
-   POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB},
-  {"405fp", PROCESSOR_PPC405,
-   POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB},
-  {"440", PROCESSOR_PPC440,
-   POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB},
-  {"440fp", PROCESSOR_PPC440,
-   POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB},
-  {"464", PROCESSOR_PPC440,
-   POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB},
-  {"464fp", PROCESSOR_PPC440,
-   POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB},
-  {"476", PROCESSOR_PPC476,
-   POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_PPC_GFXOPT | MASK_MFCRF
-   | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_MULHW | MASK_DLMZB},
-  {"476fp", PROCESSOR_PPC476,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB
-   | MASK_FPRND | MASK_CMPB | MASK_MULHW | MASK_DLMZB},
-  {"505", PROCESSOR_MPCCORE, POWERPC_BASE_MASK},
-  {"601", PROCESSOR_PPC601,
-   MASK_POWER | POWERPC_BASE_MASK | MASK_MULTIPLE | MASK_STRING},
-  {"602", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"603", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"603e", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"604", PROCESSOR_PPC604, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"604e", PROCESSOR_PPC604e, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"620", PROCESSOR_PPC620,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
-  {"630", PROCESSOR_PPC630,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
-  {"740", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"7400", PROCESSOR_PPC7400, POWERPC_7400_MASK},
-  {"7450", PROCESSOR_PPC7450, POWERPC_7400_MASK},
-  {"750", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"801", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"821", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"823", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN
-   | MASK_ISEL},
-  /* 8548 has a dummy entry for now.  */
-  {"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN
-   | MASK_ISEL},
-  {"a2", PROCESSOR_PPCA2,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_POPCNTB
-   | MASK_CMPB | MASK_NO_UPDATE },
-  {"e300c2", PROCESSOR_PPCE300C2, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"e300c3", PROCESSOR_PPCE300C3, POWERPC_BASE_MASK},
-  {"e500mc", PROCESSOR_PPCE500MC, POWERPC_BASE_MASK | MASK_PPC_GFXOPT
-   | MASK_ISEL},
-  {"e500mc64", PROCESSOR_PPCE500MC64, POWERPC_BASE_MASK | MASK_POWERPC64
-   | MASK_PPC_GFXOPT | MASK_ISEL},
-  {"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"970", PROCESSOR_POWER4,
-   POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
-  {"cell", PROCESSOR_CELL,
-   POWERPC_7400_MASK  | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
-  {"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS},
-  {"ec603e", PROCESSOR_PPC603, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
-  {"G3", PROCESSOR_PPC750, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
-  {"G4",  PROCESSOR_PPC7450, POWERPC_7400_MASK},
-  {"G5", PROCESSOR_POWER4,
-   POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
-  {"titan", PROCESSOR_TITAN,
-   POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB},
-  {"power", PROCESSOR_POWER, MASK_POWER | MASK_MULTIPLE | MASK_STRING},
-  {"power2", PROCESSOR_POWER,
-   MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING},
-  {"power3", PROCESSOR_PPC630,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
-  {"power4", PROCESSOR_POWER4,
-   POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_PPC_GFXOPT
-   | MASK_MFCRF},
-  {"power5", PROCESSOR_POWER5,
-   POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_PPC_GFXOPT
-   | MASK_MFCRF | MASK_POPCNTB},
-  {"power5+", PROCESSOR_POWER5,
-   POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_PPC_GFXOPT
-   | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND},
-  {"power6", PROCESSOR_POWER6,
-   POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_PPC_GFXOPT
-   | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP
-   | MASK_RECIP_PRECISION},
-  {"power6x", PROCESSOR_POWER6,
-   POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_PPC_GFXOPT
-   | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP
-   | MASK_MFPGPR | MASK_RECIP_PRECISION},
-  {"power7", PROCESSOR_POWER7,   /* Don't add MASK_ISEL by default */
-   POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
-   | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
-   | MASK_VSX | MASK_RECIP_PRECISION},
-  {"powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK},
-  {"powerpc64", PROCESSOR_POWERPC64,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
-  {"rios", PROCESSOR_RIOS1, MASK_POWER | MASK_MULTIPLE | MASK_STRING},
-  {"rios1", PROCESSOR_RIOS1, MASK_POWER | MASK_MULTIPLE | MASK_STRING},
-  {"rios2", PROCESSOR_RIOS2,
-   MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING},
-  {"rsc", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING},
-  {"rsc1", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING},
-  {"rs64", PROCESSOR_RS64A,
-   POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}
+#define RS6000_CPU(NAME, CPU, FLAGS) { NAME, CPU, FLAGS },
+#include "rs6000-cpus.def"
+#undef RS6000_CPU
 };
 
 /* Look up a processor name for -mcpu=xxx and -mtune=xxx.  Return -1 if the
@@ -2625,7 +2506,7 @@ darwin_rs6000_override_options (void)
       && !flag_apple_kext
       && strverscmp (darwin_macosx_version_min, "10.5") >= 0
       && ! (target_flags_explicit & MASK_ALTIVEC)
-      && ! rs6000_select[1].string)
+      && ! global_options_set.x_rs6000_cpu_index)
     {
       target_flags |= MASK_ALTIVEC;
     }
@@ -2983,7 +2864,7 @@ rs6000_option_override_internal (bool global_init_p)
       if ((target_flags & MASK_STRING) != 0)
 	target_flags = target_flags & ~MASK_STRING;
     }
-  else if (rs6000_select[1].string != NULL)
+  else if (global_options_set.x_rs6000_cpu_index)
     {
       /* For the powerpc-eabispe configuration, we set all these by
 	 default, so let's unset them if we manually set another
@@ -4181,9 +4062,6 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
   const char *arg = decoded->arg;
   int value = decoded->value;
 
-  gcc_assert (opts == &global_options);
-  gcc_assert (opts_set == &global_options_set);
-
   switch (code)
     {
     case OPT_mno_power:
@@ -4349,20 +4227,6 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
       opts->x_rs6000_altivec_abi = 0;
       break;
 
-    case OPT_mcpu_:
-      rs6000_select[1].string = arg;
-      opts->x_rs6000_cpu_index = rs6000_cpu_name_lookup (arg);
-      if (opts->x_rs6000_cpu_index < 0)
-	error_at (loc, "bad value (%s) for -mcpu", arg);
-      break;
-
-    case OPT_mtune_:
-      rs6000_select[2].string = arg;
-      opts->x_rs6000_tune_index = rs6000_cpu_name_lookup (arg);
-      if (opts->x_rs6000_tune_index < 0)
-	error_at (loc, "bad value (%s) for -mtune", arg);
-      break;
-
     case OPT_mlong_double_:
       if (value != 64 && value != 128)
 	{
@@ -4437,38 +4301,49 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
   return true;
 }
 
+/* Default CPU string for rs6000*_file_start functions.  */
+static const char *rs6000_default_cpu;
+
 /* Do anything needed at the start of the asm file.  */
 
 static void
 rs6000_file_start (void)
 {
-  size_t i;
   char buffer[80];
   const char *start = buffer;
-  struct rs6000_cpu_select *ptr;
-  const char *default_cpu = TARGET_CPU_DEFAULT;
   FILE *file = asm_out_file;
 
+  rs6000_default_cpu = TARGET_CPU_DEFAULT;
+
   default_file_start ();
 
 #ifdef TARGET_BI_ARCH
   if ((TARGET_DEFAULT ^ target_flags) & MASK_64BIT)
-    default_cpu = 0;
+    rs6000_default_cpu = 0;
 #endif
 
   if (flag_verbose_asm)
     {
       sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START);
-      rs6000_select[0].string = default_cpu;
 
-      for (i = 0; i < ARRAY_SIZE (rs6000_select); i++)
+      if (rs6000_default_cpu != 0 && rs6000_default_cpu[0] != '\0')
 	{
-	  ptr = &rs6000_select[i];
-	  if (ptr->string != (char *)0 && ptr->string[0] != '\0')
-	    {
-	      fprintf (file, "%s %s%s", start, ptr->name, ptr->string);
-	      start = "";
-	    }
+	  fprintf (file, "%s --with-cpu=%s", start, rs6000_default_cpu);
+	  start = "";
+	}
+
+      if (global_options_set.x_rs6000_cpu_index)
+	{
+	  fprintf (file, "%s -mcpu=%s", start,
+		   processor_target_table[rs6000_cpu_index].name);
+	  start = "";
+	}
+
+      if (global_options_set.x_rs6000_tune_index)
+	{
+	  fprintf (file, "%s -mtune=%s", start,
+		   processor_target_table[rs6000_tune_index].name);
+	  start = "";
 	}
 
       if (PPC405_ERRATUM77)
@@ -25712,10 +25587,12 @@ rs6000_darwin_file_start (void)
   darwin_file_start ();
 
   /* Determine the argument to -mcpu=.  Default to G3 if not specified.  */
-  for (i = 0; i < ARRAY_SIZE (rs6000_select); i++)
-    if (rs6000_select[i].set_arch_p && rs6000_select[i].string
-	&& rs6000_select[i].string[0] != '\0')
-      cpu_id = rs6000_select[i].string;
+  
+  if (rs6000_default_cpu != 0 && rs6000_default_cpu[0] != '\0')
+    cpu_id = rs6000_default_cpu;
+
+  if (global_options_set.x_rs6000_cpu_index)
+    cpu_id = processor_target_table[rs6000_cpu_index].name;
 
   /* Look through the mapping array.  Pick the first name that either
      matches the argument, has a bit set in IF_SET that is also set
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 0c44512aa4a..7518a784d2c 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -358,17 +358,6 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
    and the old mnemonics are dialect zero.  */
 #define ASSEMBLER_DIALECT (TARGET_NEW_MNEMONICS ? 1 : 0)
 
-/* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */
-struct rs6000_cpu_select
-{
-  const char *string;
-  const char *name;
-  int set_tune_p;
-  int set_arch_p;
-};
-
-extern struct rs6000_cpu_select rs6000_select[];
-
 /* Debug support */
 #define MASK_DEBUG_STACK	0x01	/* debug stack applications */
 #define	MASK_DEBUG_ARG		0x02	/* debug argument handling */
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index f62417cb9a6..35c936fe53e 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -79,14 +79,6 @@ enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL
 TargetVariable
 unsigned int rs6000_recip_control
 
-;; -mcpu=<xxx> as an index into the processor_target_table or -1
-TargetVariable
-int rs6000_cpu_index = -1
-
-;; -mtune=<xxx> as an index into the processor_target_table or -1
-TargetVariable
-int rs6000_tune_index = -1
-
 ;; Debug flags
 TargetVariable
 unsigned int rs6000_debug
@@ -402,11 +394,11 @@ mabi=ibmlongdouble
 Target RejectNegative Undocumented Warn(using IBM extended precision long double) Var(rs6000_ieeequad, 0)
 
 mcpu=
-Target RejectNegative Joined
+Target RejectNegative Joined Var(rs6000_cpu_index) Init(-1) Enum(rs6000_cpu_opt_value) Save
 -mcpu=	Use features of and schedule code for given CPU
 
 mtune=
-Target RejectNegative Joined
+Target RejectNegative Joined Var(rs6000_tune_index) Init(-1) Enum(rs6000_cpu_opt_value) Save
 -mtune=	Schedule code for given CPU
 
 mtraceback=
diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000
index bfc793f489e..588572cb008 100644
--- a/gcc/config/rs6000/t-rs6000
+++ b/gcc/config/rs6000/t-rs6000
@@ -36,6 +36,11 @@ rs6000-c.o: $(srcdir)/config/rs6000/rs6000-c.c \
 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
 		$(srcdir)/config/rs6000/rs6000-c.c
 
+$(srcdir)/config/rs6000/rs6000-tables.opt: $(srcdir)/config/rs6000/genopt.sh \
+  $(srcdir)/config/rs6000/rs6000-cpus.def
+	$(SHELL) $(srcdir)/config/rs6000/genopt.sh $(srcdir)/config/rs6000 > \
+		$(srcdir)/config/rs6000/rs6000-tables.opt
+
 # The rs6000 backend doesn't cause warnings in these files.
 insn-conditions.o-warn =