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author | macro <macro@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-09-18 15:57:53 +0000 |
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committer | macro <macro@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-09-18 15:57:53 +0000 |
commit | 360d95d3597873aa977dec5595964c330c8c39a5 (patch) | |
tree | 58dc9442c25bcae379f23060a24bf0de6b529ec5 /gcc/config/rs6000 | |
parent | 439c36e48026ec7dbbc2654aef4c228d6b020ec9 (diff) | |
download | gcc-360d95d3597873aa977dec5595964c330c8c39a5.tar.gz |
* config/rs6000/rs6000.c (print_operand) <'c'>: Remove.
* config/rs6000/spe.md: Remove a leftover comment.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@191431 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000')
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/spe.md | 2 |
2 files changed, 0 insertions, 10 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index a5a3848e585..a880e5e3f8a 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -14659,14 +14659,6 @@ print_operand (FILE *file, rtx x, int code) /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise output_operand. */ - case 'c': - /* X is a CR register. Print the number of the GT bit of the CR. */ - if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) - output_operand_lossage ("invalid %%c value"); - else - fprintf (file, "%d", 4 * (REGNO (x) - CR0_REGNO) + 1); - return; - case 'D': /* Like 'J' but get to the GT bit only. */ gcc_assert (REG_P (x)); diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index bf59b6cf552..e190be87ac2 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -2945,8 +2945,6 @@ "mfspefscr %0" [(set_attr "type" "vecsimple")]) -;; FP comparison stuff. - ;; Flip the GT bit. (define_insn "e500_flip_gt_bit" [(set (match_operand:CCFP 0 "cc_reg_operand" "=y") |