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author | Nick Clifton <nickc@redhat.com> | 2011-05-17 08:36:44 +0000 |
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committer | Nick Clifton <nickc@gcc.gnu.org> | 2011-05-17 08:36:44 +0000 |
commit | 4ffc4134c790d2d2543de6cdc3c291692b5f492a (patch) | |
tree | 83ac8cef4038d93f761859a7861e3fdaefd2b812 /gcc/config/rx | |
parent | b3db92ac1996449f3c1f29ba17c9c1b73f8b817b (diff) | |
download | gcc-4ffc4134c790d2d2543de6cdc3c291692b5f492a.tar.gz |
rx.md: Add peephole to remove redundant extensions after loads.
* config/rx/rx.md: Add peephole to remove redundant extensions
after loads.
From-SVN: r173820
Diffstat (limited to 'gcc/config/rx')
-rw-r--r-- | gcc/config/rx/rx.md | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index fdbf2876a3e..227fe310059 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -1701,6 +1701,35 @@ (extend_types:SI (match_dup 1))))] ) +;; Convert: +;; (set (reg1) (sign_extend (mem)) +;; (set (reg2) (zero_extend (reg1)) +;; into +;; (set (reg2) (zero_extend (mem))) +(define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (sign_extend:SI (match_operand:small_int_modes 1 "memory_operand"))) + (set (match_operand:SI 2 "register_operand") + (zero_extend:SI (match_operand:small_int_modes 3 "register_operand")))] + "REGNO (operands[0]) == REGNO (operands[3]) + && (REGNO (operands[0]) == REGNO (operands[2]) + || peep2_regno_dead_p (2, REGNO (operands[0])))" + [(set (match_dup 2) + (zero_extend:SI (match_dup 1)))] +) + +;; Remove the redundant sign extension from: +;; (set (reg) (extend (mem))) +;; (set (reg) (extend (reg))) +(define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (extend_types:SI (match_operand:small_int_modes 1 "memory_operand"))) + (set (match_dup 0) + (extend_types:SI (match_operand:small_int_modes 2 "register_operand")))] + "REGNO (operands[0]) == REGNO (operands[2])" + [(set (match_dup 0) (extend_types:SI (match_dup 1)))] +) + (define_insn "comparesi3_<extend_types:code><small_int_modes:mode>" [(set (reg:CC CC_REG) (compare:CC (match_operand:SI 0 "register_operand" "=r") |