* doc/md.texi (Iterators): Renamed from Macros. All contents

	changed to reflect rename of respectively define_code_macro and
	define_mode_macro to define_code_iterator and define_mode_iterator.
	(Mode Iterators, Code Iterators): Similar.
	* read-rtl.c (struct iterator_group, struct iterator_traverse_data)
	(uses_mode_iterator_p, apply_mode_iterator, uses_code_iterator_p)
	(apply_iterator_to_string, uses_iterator_p, apply_iterator_traverse)
	(initialize_iterators, find_iterator, check_code_iterator)
	(map_attr_string, apply_mode_maps, apply_iterator_to_rtx, add_mapping)
	(read_mapping, read_rtx_1): Similar.
	* config/alpha/sync.md, config/alpha/alpha.md, config/frv/frv.md,
	config/s390/s390.md, config/m32c/blkmov.md, config/m32c/m32c.md,
	config/spu/spu.md, config/sparc/sparc.md, config/sparc/sync.md,
	config/i386/i386.md, config/i386/mmx.md, config/i386/sse.md,
	config/i386/sync.md, config/crx/crx.md, config/xtensa/xtensa.md,
	config/cris/cris.c, config/cris/cris.md, config/ia64/sync.md,
	config/ia64/div.md, config/ia64/vect.md, config/ia64/ia64.md,
	config/m68k/m68k.md, config/rs6000/spe.md, config/rs6000/altivec.md,
	config/rs6000/sync.md, config/rs6000/rs6000.md,
	config/arm/vec-common.md, config/arm/neon.md, config/arm/iwmmxt.md,
	config/arm/arm.md, config/mips/mips-dsp.md, config/mips/mips.md,
	config/vax/vax.md, config/bfin/bfin.md: Similar.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127715 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 36 insertions, 36 deletions

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 3e5610b6f6d..e0e9edc3f4a 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -246,54 +246,54 @@
 ;; Other includes
 (include "tpf.md")
 
-;; Macros
+;; Iterators
 
-;; This mode macro allows floating point patterns to be generated from the
+;; These mode iterators allow floating point patterns to be generated from the
 ;; same template.
-(define_mode_macro FP [TF DF SF (TD "TARGET_HARD_DFP") (DD "TARGET_HARD_DFP")])
-(define_mode_macro BFP [TF DF SF])
-(define_mode_macro DFP [TD DD])
-(define_mode_macro DFP_ALL [TD DD SD])
-(define_mode_macro DSF [DF SF])
-(define_mode_macro SD_SF [SF SD])
-(define_mode_macro DD_DF [DF DD])
-(define_mode_macro TD_TF [TF TD])
-
-;; These mode macros allow 31-bit and 64-bit TDSI patterns to be generated
+(define_mode_iterator FP [TF DF SF (TD "TARGET_HARD_DFP") (DD "TARGET_HARD_DFP")])
+(define_mode_iterator BFP [TF DF SF])
+(define_mode_iterator DFP [TD DD])
+(define_mode_iterator DFP_ALL [TD DD SD])
+(define_mode_iterator DSF [DF SF])
+(define_mode_iterator SD_SF [SF SD])
+(define_mode_iterator DD_DF [DF DD])
+(define_mode_iterator TD_TF [TF TD])
+
+;; This mode iterator allows 31-bit and 64-bit TDSI patterns to be generated
 ;; from the same template.
-(define_mode_macro TDSI [(TI "TARGET_64BIT") DI SI])
+(define_mode_iterator TDSI [(TI "TARGET_64BIT") DI SI])
 
-;; These mode macros allow 31-bit and 64-bit GPR patterns to be generated
+;; These mode iterators allow 31-bit and 64-bit GPR patterns to be generated
 ;; from the same template.
-(define_mode_macro GPR [(DI "TARGET_64BIT") SI])
-(define_mode_macro DSI [DI SI])
+(define_mode_iterator GPR [(DI "TARGET_64BIT") SI])
+(define_mode_iterator DSI [DI SI])
 
-;; This mode macro allows :P to be used for patterns that operate on
+;; These mode iterators allow :P to be used for patterns that operate on
 ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
-(define_mode_macro DP  [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")])
-(define_mode_macro P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
+(define_mode_iterator DP  [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")])
+(define_mode_iterator P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
 
-;; This mode macro allows the QI and HI patterns to be defined from
+;; This mode iterator allows the QI and HI patterns to be defined from
 ;; the same template.
-(define_mode_macro HQI [HI QI])
+(define_mode_iterator HQI [HI QI])
 
-;; This mode macro allows the integer patterns to be defined from the
+;; This mode iterator allows the integer patterns to be defined from the
 ;; same template.
-(define_mode_macro INT [(DI "TARGET_64BIT") SI HI QI])
+(define_mode_iterator INT [(DI "TARGET_64BIT") SI HI QI])
 
-;; This macro allows to unify all 'bCOND' expander patterns.
-(define_code_macro COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered 
+;; This iterator allows to unify all 'bCOND' expander patterns.
+(define_code_iterator COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered 
 		            ordered uneq unlt ungt unle unge ltgt])
 
-;; This macro allows to unify all 'sCOND' patterns.
-(define_code_macro SCOND [ltu gtu leu geu])
+;; This iterator allows to unify all 'sCOND' patterns.
+(define_code_iterator SCOND [ltu gtu leu geu])
 
-;; This macro allows some 'ashift' and 'lshiftrt' pattern to be defined from
+;; This iterator allows some 'ashift' and 'lshiftrt' pattern to be defined from
 ;; the same template.
-(define_code_macro SHIFT [ashift lshiftrt])
+(define_code_iterator SHIFT [ashift lshiftrt])
 
-;; These macros allow to combine most atomic operations.
-(define_code_macro ATOMIC [and ior xor plus minus mult])
+;; This iterator and attribute allow to combine most atomic operations.
+(define_code_iterator ATOMIC [and ior xor plus minus mult])
 (define_code_attr atomic [(and "and") (ior "ior") (xor "xor") 
 			  (plus "add") (minus "sub") (mult "nand")])
 
@@ -312,18 +312,18 @@
 (define_mode_attr RXe [(TF "RXE") (DF "RX") (SF "RX")])
 
 ;; The decimal floating point variants of add, sub, div and mul support 3
-;; fp register operands.  The following macros allow to merge the bfp and
+;; fp register operands.  The following attributes allow to merge the bfp and
 ;; dfp variants in a single insn definition.
 
-;; This macro is used to set op_type accordingly.
+;; This attribute is used to set op_type accordingly.
 (define_mode_attr RRer [(TF "RRE") (DF "RRE") (SF "RRE") (TD "RRR") 
                         (DD "RRR") (SD "RRR")])
 
-;; This macro is used in the operand constraint list in order to have the 
+;; This attribute is used in the operand constraint list in order to have the 
 ;; first and the second operand match for bfp modes.
 (define_mode_attr f0 [(TF "0") (DF "0") (SF "0") (TD "f") (DD "f") (DD "f")])
 
-;; This macro is used in the operand list of the instruction to have an 
+;; This attribute is used in the operand list of the instruction to have an 
 ;; additional operand for the dfp instructions.
 (define_mode_attr op1 [(TF "") (DF "") (SF "")
                        (TD "%1,") (DD "%1,") (SD "%1,")])
@@ -341,7 +341,7 @@
 ;; This is used to disable the memory alternative in TFmode patterns.
 (define_mode_attr Rf [(TF "f") (DF "R") (SF "R") (TD "f") (DD "f") (SD "f")])
 
-;; This macro adds b for bfp instructions and t for dfp instructions and is used
+;; This attribute adds b for bfp instructions and t for dfp instructions and is used
 ;; within instruction mnemonics.
 (define_mode_attr bt [(TF "b") (DF "b") (SF "b") (TD "t") (DD "t") (SD "t")])