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authorRamana Radhakrishnan <ramana.radhakrishnan@arm.com>2015-06-04 09:19:51 +0000
committerRamana Radhakrishnan <ramana@gcc.gnu.org>2015-06-04 09:19:51 +0000
commite93ca5cadeb71a04b2f8ef2ebcbadb2f0213d878 (patch)
treeb1f66152fa773d5b7dac557924b8c752070f198e /gcc/config/sparc
parente2fc719399b507122ef4ea1867cff58e214be912 (diff)
downloadgcc-e93ca5cadeb71a04b2f8ef2ebcbadb2f0213d878.tar.gz
Remove TARGET_RELAXED_ORDERING and optimize for weak memory models.
This patch removes the special casing for targets with relaxed memory ordering and handles guard accesses with equivalent atomic load acquire operations. In this process we change the algorithm to load the guard variable with an atomic load that has ACQUIRE semantics. This then means that on targets which have weak memory models, the fast path is inlined and can directly use a load-acquire instruction where available (and yay! one more hook gone). 2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR c++/66192 PR target/66200 * doc/tm.texi: Regenerate. * doc/tm.texi.in (TARGET_RELAXED_ORDERING): Delete. * target.def (TARGET_RELAXED_ORDERING): Likewise. * config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Likewise. * config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Likewise. * config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Likewise. * config/sparc/linux.h (SPARC_RELAXED_ORDERING): Likewise. * config/sparc/linux64.h (SPARC_RELAXED_ORDERING): Likewise. * config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Likewise. * config/sparc/sparc.h (SPARC_RELAXED_ORDERING): Likewise. * system.h (TARGET_RELAXED_ORDERING): Poison. 2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR c++/66192 PR target/66200 * cp-tree.h (get_guard_cond): Adjust declaration * decl.c (expand_static_init): Use atomic load acquire and adjust call to get_guard_cond. * decl2.c (build_atomic_load_byte): New function. (get_guard_cond): Handle thread_safety. (one_static_initialization_or_destruction): Adjust call to get_guard_cond. From-SVN: r224118
Diffstat (limited to 'gcc/config/sparc')
-rw-r--r--gcc/config/sparc/linux.h6
-rw-r--r--gcc/config/sparc/linux64.h6
-rw-r--r--gcc/config/sparc/sparc.c3
-rw-r--r--gcc/config/sparc/sparc.h11
4 files changed, 0 insertions, 26 deletions
diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h
index 17e1e862b68..29763c4bae7 100644
--- a/gcc/config/sparc/linux.h
+++ b/gcc/config/sparc/linux.h
@@ -139,12 +139,6 @@ do { \
/* Static stack checking is supported by means of probes. */
#define STACK_CHECK_STATIC_BUILTIN 1
-/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
- TMO, and TMO in multiprocessor mode. But they reserve the right to
- change their minds. */
-#undef SPARC_RELAXED_ORDERING
-#define SPARC_RELAXED_ORDERING true
-
#undef NEED_INDICATE_EXEC_STACK
#define NEED_INDICATE_EXEC_STACK 1
diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
index 43da8480f24..efa33fbf77b 100644
--- a/gcc/config/sparc/linux64.h
+++ b/gcc/config/sparc/linux64.h
@@ -253,12 +253,6 @@ do { \
/* Static stack checking is supported by means of probes. */
#define STACK_CHECK_STATIC_BUILTIN 1
-/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
- TMO, and TMO in multiprocessor mode. But they reserve the right to
- change their minds. */
-#undef SPARC_RELAXED_ORDERING
-#define SPARC_RELAXED_ORDERING true
-
#undef NEED_INDICATE_EXEC_STACK
#define NEED_INDICATE_EXEC_STACK 1
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index a1562ad8630..094287f5c11 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -808,9 +808,6 @@ char sparc_hard_reg_printed[8];
#define TARGET_ATTRIBUTE_TABLE sparc_attribute_table
#endif
-#undef TARGET_RELAXED_ORDERING
-#define TARGET_RELAXED_ORDERING SPARC_RELAXED_ORDERING
-
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE sparc_option_override
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 106d993ee35..72dd18bfdfc 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -106,17 +106,6 @@ extern enum cmodel sparc_cmodel;
#define SPARC_DEFAULT_CMODEL CM_32
-/* The SPARC-V9 architecture defines a relaxed memory ordering model (RMO)
- which requires the following macro to be true if enabled. Prior to V9,
- there are no instructions to even talk about memory synchronization.
- Note that the UltraSPARC III processors don't implement RMO, unlike the
- UltraSPARC II processors. Niagara, Niagara-2, and Niagara-3 do not
- implement RMO either.
-
- Default to false; for example, Solaris never enables RMO, only ever uses
- total memory ordering (TMO). */
-#define SPARC_RELAXED_ORDERING false
-
/* Do not use the .note.GNU-stack convention by default. */
#define NEED_INDICATE_EXEC_STACK 0