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author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-11-16 18:33:57 +0000 |
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committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-11-16 18:33:57 +0000 |
commit | 66d2837f62c0e1abfd6a209f23b387b1f16f1a76 (patch) | |
tree | 63267a298383deb68d94666029b5e39ee714091f /gcc/config/we32k | |
parent | 870d099434b31325db48f75e9b3b33eaab9e6290 (diff) | |
download | gcc-66d2837f62c0e1abfd6a209f23b387b1f16f1a76.tar.gz |
* config/a29k/a29k.c: Fix comment formatting.
* config/a29k/a29k.h: Likewise.
* config/arc/arc.c: Likewise.
* config/arc/arc.h: Likewise.
* config/vax/vax.c: Likewise.
* config/vax/vax.h: Likewise.
* config/we32k/we32k.c: Likewise.
* config/we32k/we32k.h: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@47091 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/we32k')
-rw-r--r-- | gcc/config/we32k/we32k.c | 2 | ||||
-rw-r--r-- | gcc/config/we32k/we32k.h | 44 |
2 files changed, 23 insertions, 23 deletions
diff --git a/gcc/config/we32k/we32k.c b/gcc/config/we32k/we32k.c index 5ee63acfd02..32d6bb184b2 100644 --- a/gcc/config/we32k/we32k.c +++ b/gcc/config/we32k/we32k.c @@ -81,7 +81,7 @@ we32k_output_function_prologue (file, size) The function epilogue should not depend on the current stack pointer! It should use the frame pointer only. This is mandatory because of alloca; we also take advantage of it to omit stack - adjustments before returning. */ + adjustments before returning. */ static void we32k_output_function_epilogue (file, size) diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h index 66f01f9b9b7..00078017214 100644 --- a/gcc/config/we32k/we32k.h +++ b/gcc/config/we32k/we32k.h @@ -50,7 +50,7 @@ extern int target_flags; /* target machine storage layout */ /* Define this if most significant bit is lowest numbered - in instructions that operate on numbered bit-fields. */ + in instructions that operate on numbered bit-fields. */ #define BITS_BIG_ENDIAN 0 /* Define this if most significant byte of a word is the lowest numbered. */ @@ -117,11 +117,11 @@ extern int target_flags; The hardware registers are assigned numbers for the compiler from 0 to just below FIRST_PSEUDO_REGISTER. All registers that the compiler knows about must be given numbers, - even those that are not normally considered general registers. */ + even those that are not normally considered general registers. */ #define FIRST_PSEUDO_REGISTER 16 /* 1 for registers that have pervasive standard uses - and are not available for the register allocator. */ + and are not available for the register allocator. */ #define FIXED_REGISTERS \ {0, 0, 0, 0, 0, 0, 0, 0, \ 0, 1, 1, 1, 1, 1, 1, 1, } @@ -145,11 +145,11 @@ extern int target_flags; /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. This is ordinarily the length in words of a value of mode MODE - but can be less for certain modes in special long registers. */ + but can be less for certain modes in special long registers. */ #define HARD_REGNO_NREGS(REGNO, MODE) \ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) -/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ +/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 /* Value is 1 if it is a good idea to tie two pseudo registers @@ -186,7 +186,7 @@ extern int target_flags; is passed to a function. */ #define STRUCT_VALUE_REGNUM 2 -/* Order in which to allocate registers. */ +/* Order in which to allocate registers. */ #define REG_ALLOC_ORDER \ {0, 1, 8, 7, 6, 5, 4, 3} @@ -215,7 +215,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, #define N_REG_CLASSES (int) LIM_REG_CLASSES -/* Give names of register classes as strings for dump file. */ +/* Give names of register classes as strings for dump file. */ #define REG_CLASS_NAMES \ { "NO_REGS", "GENERAL_REGS", "ALL_REGS" } @@ -249,7 +249,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, machine description; we zorch the constraint letters that aren't appropriate for a specific target. This allows us to guarantee that a specific kind of register will not be used for a given target - without fiddling with the register classes above. */ + without fiddling with the register classes above. */ #define REG_CLASS_FROM_LETTER(C) \ ((C) == 'r' ? GENERAL_REGS : NO_REGS) @@ -258,7 +258,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, can be used to stand for particular ranges of immediate operands. This macro defines what the ranges are. C is the letter, and VALUE is a constant value. - Return 1 if VALUE is in the range specified by C. */ + Return 1 if VALUE is in the range specified by C. */ #define CONST_OK_FOR_LETTER_P(VALUE, C) 0 @@ -270,7 +270,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* Given an rtx X being reloaded into a reg required to be in class CLASS, return the class of reg to actually use. In general this is just CLASS; but on some machines - in some cases it is preferable to use a more restrictive class. */ + in some cases it is preferable to use a more restrictive class. */ #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) @@ -298,7 +298,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, #define STARTING_FRAME_OFFSET 0 /* If we generate an insn to push BYTES bytes, - this says how many the stack pointer really advances by. */ + this says how many the stack pointer really advances by. */ #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) /* Offset of first parameter from the argument pointer register value. */ @@ -308,7 +308,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, pops the arguments described by the number-of-args field in the call. FUNDECL is the declaration node of the function (as a tree), FUNTYPE is the data type of the function (as a tree), - or for a library call it is an identifier node for the subroutine name. */ + or for a library call it is an identifier node for the subroutine name. */ #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (SIZE) @@ -542,7 +542,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression - that wants to use this address. */ + that wants to use this address. */ #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ { register rtx Addr = X; \ @@ -573,12 +573,12 @@ enum reg_class { NO_REGS, GENERAL_REGS, GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize - opportunities to optimize the output. */ + opportunities to optimize the output. */ #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) { } /* Go to LABEL if ADDR (a legitimate address expression) - has an effect that depends on the machine mode it is used for. */ + has an effect that depends on the machine mode it is used for. */ #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) { } @@ -589,7 +589,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* Define as C expression which evaluates to nonzero if the tablejump instruction expects the table to contain offsets from the address of the table. - Do not define this if the table should contain absolute addresses. */ + Do not define this if the table should contain absolute addresses. */ /* #define CASE_VECTOR_PC_RELATIVE 1 */ /* Specify the tree operation to be used to convert reals to integers. */ @@ -612,7 +612,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, #define SLOW_BYTE_ACCESS 0 /* Define this to be nonzero if shift instructions ignore all but the low-order - few bits. */ + few bits. */ #define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits @@ -697,7 +697,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* Read-only data goes in the data section because AT&T's assembler doesn't guarantee the proper alignment of data in the text section even if an align statement - is used. */ + is used. */ #define READONLY_DATA_SECTION() data_section() @@ -708,7 +708,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ "r8", "fp", "ap", "psw", "sp", "pcbp", "isp", "pc" } -/* How to renumber registers for dbx and gdb. */ +/* How to renumber registers for dbx and gdb. */ #define DBX_REGISTER_NUMBER(REGNO) (REGNO) @@ -732,7 +732,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, fputs ("\n", FILE); \ } while (0) -/* The prefix to add to user-visible assembler symbols. */ +/* The prefix to add to user-visible assembler symbols. */ #define USER_LABEL_PREFIX "" @@ -843,7 +843,7 @@ do { \ #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ fprintf (FILE, "\tPOPW %s\n", reg_names[REGNO]) -/* This is how to output an element of a case-vector that is absolute. */ +/* This is how to output an element of a case-vector that is absolute. */ #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ fprintf (FILE, "\t.word .L%d\n", VALUE) @@ -921,7 +921,7 @@ do { \ /* Print operand X (an rtx) in assembler syntax to file FILE. CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. - For `%' followed by punctuation, CODE is the punctuation and X is null. */ + For `%' followed by punctuation, CODE is the punctuation and X is null. */ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0 |