* expmed.c (extract_fixed_bit_field): Remove unused code.

	* system.h: Poison SLOW_ZERO_EXTEND.
	* doc/tm.texi: Remove.
	* config/1750a/1750a.h (SLOW_ZERO_EXTEND): Remove.
	* config/arm/arm.h: Likewise.
	* config/avr/avr.h: Likewise.
	* config/clipper/clipper.h: Likewise.
	* config/convex/convex.h: Likewise.
	* config/d30v/d30v.h: Likewise.
	* config/dsp16xx/dsp16xx.h: Likewise.
	* config/elxsi/elxsi.h: Likewise.
	* config/fr30/fr30.h: Likewise.
	* config/h8300/h8300.h: Likewise.
	* config/i370/i370.h: Likewise.
	* config/i386/i386.h: Likewise.
	* config/m68k/m68k.h: Likewise.
	* config/mips/mips.h: Likewise.
	* config/ns32k/ns32k.h: Likewise.
	* config/pdp11/pdp11.h: Likewise.
	* config/pj/pj.h: Likewise.
	* config/s390/s390.h: Likewise.
	* config/sh/sh.h: Likewise.
	* config/stormy16/stormy16.h: Likewise.
	* config/v850/v850.h: Likewise.
	* config/vax/vax.h: Likewise.
	* config/we32k/we32k.h: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@48893 138bc75d-0d04-0410-961f-82ee72b054a4

23 files changed, 0 insertions, 120 deletions

diff --git a/gcc/config/1750a/1750a.h b/gcc/config/1750a/1750a.h
index 21d60e91a2b..d93d81fddcb 100644
--- a/gcc/config/1750a/1750a.h
+++ b/gcc/config/1750a/1750a.h
@@ -770,9 +770,6 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA
    move-instruction pairs, we will do a movstr or libcall instead.  */
 #define MOVE_RATIO 4
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index ef07ceae8ab..5a7b9b543d3 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2385,11 +2385,6 @@ typedef struct
    ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND			\
     : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : NIL)))
 
-/* Define this if zero-extension is slow (more than one real instruction).
-   On the ARM, it is more than one instruction only if not fetching from
-   memory.  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index efa47626331..d3a33faec40 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -1797,18 +1797,6 @@ do {									    \
    subsequent accesses occur to other fields in the same word of the
    structure, but to different bytes.
 
-   `SLOW_ZERO_EXTEND'
-   Define this macro if zero-extension (of a `char' or `short' to an
-   `int') can be done faster if the destination is a register that is
-   known to be zero.
-
-   If you define this macro, you must have instruction patterns that
-   recognize RTL structures like this:
-
-   (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
-   and likewise for `HImode'.
-
    `SLOW_UNALIGNED_ACCESS'
    Define this macro to be the value 1 if unaligned accesses have a
    cost many times greater than aligned accesses, for example if they
diff --git a/gcc/config/clipper/clipper.h b/gcc/config/clipper/clipper.h
index 473cab60ed1..790202b4e36 100644
--- a/gcc/config/clipper/clipper.h
+++ b/gcc/config/clipper/clipper.h
@@ -796,9 +796,6 @@ do									      \
 
 #define MOVE_RATIO 20
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/convex/convex.h b/gcc/config/convex/convex.h
index 7f3d41c8833..72224630c68 100644
--- a/gcc/config/convex/convex.h
+++ b/gcc/config/convex/convex.h
@@ -1031,9 +1031,6 @@ enum reg_class {
    in one reasonably fast instruction.  */
 #define MOVE_MAX 8
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS (! TARGET_C2)
 
diff --git a/gcc/config/d30v/d30v.h b/gcc/config/d30v/d30v.h
index 6b9d3818560..a48934401f8 100644
--- a/gcc/config/d30v/d30v.h
+++ b/gcc/config/d30v/d30v.h
@@ -3432,17 +3432,6 @@ extern const char *d30v_branch_cost_string;
    same word of the structure, but to different bytes.  */
 #define SLOW_BYTE_ACCESS 1
 
-/* Define this macro if zero-extension (of a `char' or `short' to an `int') can
-   be done faster if the destination is a register that is known to be zero.
-
-   If you define this macro, you must have instruction patterns that recognize
-   RTL structures like this:
-
-        (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
-   and likewise for `HImode'.  */
-#define SLOW_ZERO_EXTEND 0
-
 /* Define this macro to be the value 1 if unaligned accesses have a cost many
    times greater than aligned accesses, for example if they are emulated in a
    trap handler.
diff --git a/gcc/config/dsp16xx/dsp16xx.h b/gcc/config/dsp16xx/dsp16xx.h
index a2370cfb4ab..ae2f72569a2 100644
--- a/gcc/config/dsp16xx/dsp16xx.h
+++ b/gcc/config/dsp16xx/dsp16xx.h
@@ -1565,10 +1565,6 @@ extern struct dsp16xx_frame_info current_frame_info;
    loads.  */
 #define SLOW_BYTE_ACCESS 1
 
-/* Define this macro if zero-extension (of a char or short to an int) can
-   be done faster if the destination is a register that is know to be zero.  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Define this macro if unaligned accesses have a cost many times greater than
    aligned accesses, for example if they are emulated in a trap handler */
 /* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
diff --git a/gcc/config/elxsi/elxsi.h b/gcc/config/elxsi/elxsi.h
index 6ff4d3cc83b..d5969d4ea2b 100644
--- a/gcc/config/elxsi/elxsi.h
+++ b/gcc/config/elxsi/elxsi.h
@@ -577,9 +577,6 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES };
    in one reasonably fast instruction.  */
 #define MOVE_MAX 8
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h
index 760ab22d941..6bda37d33ed 100644
--- a/gcc/config/fr30/fr30.h
+++ b/gcc/config/fr30/fr30.h
@@ -1359,17 +1359,6 @@ do										\
    same word of the structure, but to different bytes.  */
 #define SLOW_BYTE_ACCESS 1
 
-/* Define this macro if zero-extension (of a `char' or `short' to an `int') can
-   be done faster if the destination is a register that is known to be zero.
-
-   If you define this macro, you must have instruction patterns that recognize
-   RTL structures like this:
-
-        (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
-   and likewise for `HImode'.  */
-#define SLOW_ZERO_EXTEND 0
-
 /*}}}*/ 
 /*{{{  Dividing the output into sections.  */ 
 
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 3c782d482be..d7d89b02c42 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -965,9 +965,6 @@ struct cum_arg
 #define MOVE_MAX	(TARGET_H8300H || TARGET_H8300S ? 4 : 2)
 #define MAX_MOVE_MAX	4
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
 
diff --git a/gcc/config/i370/i370.h b/gcc/config/i370/i370.h
index 7c71b0e2077..c2c7d4aeaa6 100644
--- a/gcc/config/i370/i370.h
+++ b/gcc/config/i370/i370.h
@@ -874,10 +874,6 @@ enum reg_class
 
 #define MOVE_MAX 256
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-
-#define SLOW_ZERO_EXTEND 1
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 
 #define SLOW_BYTE_ACCESS 1
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 8f8e208d1a4..4f2b9038ded 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2681,19 +2681,6 @@ do {							\
 /* Nonzero if access to memory by shorts is slow and undesirable.  */
 #define SLOW_SHORT_ACCESS 0
 
-/* Define this macro if zero-extension (of a `char' or `short' to an
-   `int') can be done faster if the destination is a register that is
-   known to be zero.
-
-   If you define this macro, you must have instruction patterns that
-   recognize RTL structures like this:
-
-          (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
-   and likewise for `HImode'.  */
-
-/* #define SLOW_ZERO_EXTEND */
-
 /* Define this macro to be the value 1 if unaligned accesses have a
    cost many times greater than aligned accesses, for example if they
    are emulated in a trap handler.
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index dc0835a2308..d97978c46e9 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -1529,9 +1529,6 @@ __transfer_from_trampoline ()					\
    in one reasonably fast instruction.  */
 #define MOVE_MAX 4
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-#define SLOW_ZERO_EXTEND
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index a6e572e04a8..2c3588a30e3 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -3378,9 +3378,6 @@ while (0)
 
 #define STORE_FLAG_VALUE 1
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-#define SLOW_ZERO_EXTEND
-
 /* Define this to be nonzero if shift instructions ignore all but the low-order
    few bits.  */
 #define SHIFT_COUNT_TRUNCATED 1
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index 40dc12c3461..159148dbb31 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -1116,9 +1116,6 @@ while (0)
    We have a smart movstrsi insn */
 #define MOVE_RATIO 0
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h
index 30bb630c2cb..2c16aa80ddb 100644
--- a/gcc/config/pdp11/pdp11.h
+++ b/gcc/config/pdp11/pdp11.h
@@ -888,9 +888,6 @@ extern int may_call_alloca;
 
 #define MOVE_MAX 2
 
-/* Zero extension is faster if the target is known to be zero */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by byte is slow and undesirable. -
 */
 #define SLOW_BYTE_ACCESS 0
diff --git a/gcc/config/pj/pj.h b/gcc/config/pj/pj.h
index f56564df207..655ae0d6498 100644
--- a/gcc/config/pj/pj.h
+++ b/gcc/config/pj/pj.h
@@ -932,11 +932,6 @@ struct pj_args
 
 #define SHORT_IMMEDIATES_SIGN_EXTEND
 
-/* Define this if zero-extension is slow (more than one real
-   instruction).  */
-
-/* #define SLOW_ZERO_EXTEND  */
-
 /* Nonzero if access to memory by bytes is no faster than for words.  */
 #define SLOW_BYTE_ACCESS 1
 
diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index b21f4daef80..57e39aa5f86 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -1061,10 +1061,6 @@ CUMULATIVE_ARGS;
 
 #define MOVE_MAX 256
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-
-#define SLOW_ZERO_EXTEND
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 
 #define SLOW_BYTE_ACCESS 1
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index b4b7e8ee0e9..98939decb50 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -1682,10 +1682,6 @@ extern int current_function_anonymous_args;
 /* Define if loading short immediate values into registers sign extends.  */
 #define SHORT_IMMEDIATES_SIGN_EXTEND
 
-/* Define this if zero-extension is slow (more than one real instruction).
-   On the SH, it's only one instruction.  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is no faster than for words.  */
 #define SLOW_BYTE_ACCESS 1
 
diff --git a/gcc/config/stormy16/stormy16.h b/gcc/config/stormy16/stormy16.h
index 4b125a751b7..bffcdfc1208 100644
--- a/gcc/config/stormy16/stormy16.h
+++ b/gcc/config/stormy16/stormy16.h
@@ -3193,17 +3193,6 @@ do {							\
    same word of the structure, but to different bytes.  */
 #define SLOW_BYTE_ACCESS 0
 
-/* Define this macro if zero-extension (of a `char' or `short' to an `int') can
-   be done faster if the destination is a register that is known to be zero.
-
-   If you define this macro, you must have instruction patterns that recognize
-   RTL structures like this:
-
-        (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
-
-   and likewise for `HImode'.  */
-#define SLOW_ZERO_EXTEND 0
-
 /* Define this macro to be the value 1 if unaligned accesses have a cost many
    times greater than aligned accesses, for example if they are emulated in a
    trap handler.
diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h
index 64bdc205c57..7e0cdb63e80 100644
--- a/gcc/config/v850/v850.h
+++ b/gcc/config/v850/v850.h
@@ -1031,9 +1031,6 @@ do {									\
    than accessing full words.  */
 #define SLOW_BYTE_ACCESS 1
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-#define SLOW_ZERO_EXTEND 
-
 /* According expr.c, a value of around 6 should minimize code size, and
    for the V850 series, that's our primary concern.  */
 #define MOVE_RATIO 6
diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h
index 47a086650b9..26e767d37d0 100644
--- a/gcc/config/vax/vax.h
+++ b/gcc/config/vax/vax.h
@@ -807,9 +807,6 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
    in one reasonably fast instruction.  */
 #define MOVE_MAX 8
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h
index 98a29b4fad1..12f105d8fae 100644
--- a/gcc/config/we32k/we32k.h
+++ b/gcc/config/we32k/we32k.h
@@ -599,9 +599,6 @@ enum reg_class { NO_REGS, GENERAL_REGS,
    in one reasonably fast instruction.  */
 #define MOVE_MAX 4
 
-/* Define this if zero-extension is slow (more than one real instruction).  */
-/* #define SLOW_ZERO_EXTEND */
-
 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 #define SLOW_BYTE_ACCESS 0