Use rtx_insn for various target.def hooks

gcc/
2014-08-27  David Malcolm  <dmalcolm@redhat.com>

	* target.def (unwind_emit): Strengthen param "insn" from rtx to
	rtx_insn *.
	(final_postscan_insn): Likewise.
	(adjust_cost): Likewise.
	(adjust_priority): Likewise.
	(variable_issue): Likewise.
	(macro_fusion_pair_p): Likewise.
	(dfa_post_cycle_insn): Likewise.
	(first_cycle_multipass_dfa_lookahead_guard): Likewise.
	(first_cycle_multipass_issue): Likewise.
	(dfa_new_cycle): Likewise.
	(adjust_cost_2): Likewise for params "insn" and "dep_insn".
	(speculate_insn): Likewise for param "insn".
	(gen_spec_check): Likewise for params "insn" and "label".
	(get_insn_spec_ds): Likewise for param "insn".
	(get_insn_checked_ds): Likewise.
	(dispatch_do): Likewise.
	(dispatch): Likewise.
	(cannot_copy_insn_p): Likewise.
	(invalid_within_doloop): Likewise.
	(legitimate_combined_insn): Likewise.
	(needed): Likewise.
	(after): Likewise.

	* doc/tm.texi: Automatically updated to reflect changes to
	target.def.

	* haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when
	working with insn.
	(schedule_block): Likewise.
	(sched_init): Likewise.
	(sched_speculate_insn): Strengthen param "insn" from rtx to
	rtx_insn *.
	(ready_remove_first_dispatch): Convert NULL_RTX to NULL when
	working with insn.
	* hooks.c (hook_bool_rtx_true): Rename to...
	hook_bool_rtx_insn_true): ...this, and strengthen first param from
	rtx to rtx_insn *.
	(hook_constcharptr_const_rtx_null): Rename to...
	(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
	first param from const_rtx to const rtx_insn *.
	(hook_bool_rtx_int_false): Rename to...
	(hook_bool_rtx_insn_int_false): ...this, and strengthen first
	param from rtx to rtx_insn *.
	(hook_void_rtx_int): Rename to...
	(hook_void_rtx_insn_int): ...this, and strengthen first param from
	rtx to rtx_insn *.

	* hooks.h (hook_bool_rtx_true): Rename to...
	(hook_bool_rtx_insn_true): ...this, and strengthen first param from
	rtx to rtx_insn *.
	(hook_bool_rtx_int_false): Rename to...
	(hook_bool_rtx_insn_int_false): ...this, and strengthen first
	param from rtx to rtx_insn *.
	(hook_void_rtx_int): Rename to...
	(hook_void_rtx_insn_int): ...this, and strengthen first param from
	rtx to rtx_insn *.
	(hook_constcharptr_const_rtx_null): Rename to...
	(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
	first param from const_rtx to const rtx_insn *.

	* sched-deps.c (sched_macro_fuse_insns): Strengthen param "insn"
	and local "prev" from rtx to rtx_insn *.

	* sched-int.h (sched_speculate_insn): Strengthen first param from
	rtx to rtx_insn *.

	* sel-sched.c (create_speculation_check): Likewise for local "label".
	* targhooks.c (default_invalid_within_doloop): Strengthen param
	"insn" from const_rtx to const rtx_insn *.
	* targhooks.h (default_invalid_within_doloop): Strengthen param
	from const_rtx to const rtx_insn *.

	* config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise.
	(alpha_adjust_cost): Likewise for params "insn", "dep_insn".

	* config/arc/arc.c (arc_sched_adjust_priority): Likewise for param
	"insn".
	(arc_invalid_within_doloop): Likewise, with const.

	* config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep".
	(arm_cannot_copy_insn_p): Likewise for param "insn".
	(arm_unwind_emit): Likewise.

	* config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn",
	"dep_insn".

	* config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn".
	(c6x_variable_issue): Likewise.  Removed now-redundant checked
	cast.
	(c6x_adjust_cost): Likewise for params "insn", "dep_insn".

	* config/epiphany/epiphany-protos.h (epiphany_mode_needed):
	Likewise for param "insn".
	(epiphany_mode_after): Likewise.
	* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for
	params "insn", "dep_insn".
	(epiphany_mode_needed): Likewise for param "insn".
	(epiphany_mode_after): Likewise.

	* config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise.
	* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
	(ix86_avx_u128_mode_needed): Likewise.
	(ix86_i387_mode_needed): Likewise.
	(ix86_mode_needed): Likewise.
	(ix86_avx_u128_mode_after): Likewise.
	(ix86_mode_after): Likewise.
	(ix86_adjust_cost): Likewise for params "insn", "dep_insn".
	(ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp".
	(ix86_adjust_priority): Likewise for param "insn".
	(core2i7_first_cycle_multipass_issue): Likewise for param "insn".
	(do_dispatch): Likewise.
	(has_dispatch): Likewise.
	* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.

	* config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to
	reflect renaming of default hook implementation from
	hook_constcharptr_const_rtx_null to
	hook_constcharptr_const_rtx_insn_null.
	(ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from
	rtx to rtx_insn *.
	(ia64_variable_issue): Likewise for param "insn".
	(ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise.
	(ia64_dfa_new_cycle): Likewise.
	(ia64_get_insn_spec_ds): Likewise.
	(ia64_get_insn_checked_ds): Likewise.
	(ia64_speculate_insn): Likewise.
	(ia64_gen_spec_check): Likewise for params "insn", "label".
	(ia64_asm_unwind_emit): Likewise for param "insn".

	* config/m32r/m32r.c (m32r_adjust_priority): Likewise.

	* config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params
	"insn", "def_insn".
	(m68k_sched_variable_issue): Likewise for param "insn".

	* config/mep/mep.c (mep_adjust_cost): Likewise for params "insn",
	"def_insn".

	* config/microblaze/microblaze.c (microblaze_adjust_cost):
	Likewise for params "insn", "dep".

	* config/mips/mips.c (mips_adjust_cost): Likewise.
	(mips_variable_issue): Likewise for param "insn".
	(mips_final_postscan_insn): Likewise.

	* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise
	for params "insn", "dep".

	* config/pa/pa.c (pa_adjust_cost): Likewise for params "insn",
	"dep_insn".
	(pa_adjust_priority): Likewise for param "insn".

	* config/picochip/picochip.c (picochip_sched_adjust_cost):
	Likewise for params "insn", "dep_insn".

	* config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for
	param "insn".
	(rs6000_variable_issue): Likewise.
	(rs6000_adjust_cost): Likewise for params "insn", "dep_insn".
	(rs6000_debug_adjust_cost): Likewise.
	(rs6000_adjust_priority): Likewise for param "insn".
	(rs6000_use_sched_lookahead_guard): Likewise.
	(get_next_active_insn): Likewise for return type and both params.
	(redefine_groups): Likewise for params "prev_head_insn", "tail"
	and locals "insn", "next_insn".
	(pad_groups): Likewise.

	* config/s390/s390.c (s390_adjust_priority): Likewise for param
	"insn".
	(s390_cannot_copy_insn_p): Likewise.
	(s390_sched_variable_issue): Likewise for third param, eliminating
	checked cast.
	(TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of
	default hook implementation from hook_constcharptr_const_rtx_null
	to hook_constcharptr_const_rtx_insn_null.

	* config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn"
	from rtx to rtx_insn *.
	(sh_adjust_cost): Likewise for params "insn", "dep_insn".
	(sh_variable_issue): Likewise for param "insn".
	(sh_dfa_new_cycle): Likewise.
	(sh_mode_needed): Likewise.
	(sh_mode_after): Likewise.

	* config/sparc/sparc.c (supersparc_adjust_cost): Likewise for
	params "insn", "dep_insn".
	(hypersparc_adjust_cost): Likewise.
	(sparc_adjust_cost): Likewise.

	* config/spu/spu.c (spu_sched_variable_issue): Likewise for third
	param, eliminated checked cast.
	(spu_sched_adjust_cost): Likewise for first and third params.

	* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen
	params "insn" and "dep_insn" from rtx to rtx_insn *.

	* config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@214584 138bc75d-0d04-0410-961f-82ee72b054a4

26 files changed, 127 insertions, 122 deletions

diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index dec604e36a4..52eb37a941a 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1274,7 +1274,7 @@ split_small_symbolic_operand (rtx x)
    containing the call and branch to the block containing the ldgp.  */
 
 static bool
-alpha_cannot_copy_insn_p (rtx insn)
+alpha_cannot_copy_insn_p (rtx_insn *insn)
 {
   if (!reload_completed || !TARGET_EXPLICIT_RELOCS)
     return false;
@@ -4803,7 +4803,7 @@ alpha_split_atomic_exchange_12 (rtx operands[])
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-alpha_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+alpha_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type dep_insn_type;
 
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 352080f65b9..3c482f7526e 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -395,7 +395,7 @@ static bool arc_vector_mode_supported_p (enum machine_mode);
 
 static bool arc_can_use_doloop_p (const widest_int &, const widest_int &,
 				  unsigned int, bool);
-static const char *arc_invalid_within_doloop (const_rtx);
+static const char *arc_invalid_within_doloop (const rtx_insn *);
 
 static void output_short_suffix (FILE *file);
 
@@ -572,7 +572,7 @@ static void arc_finalize_pic (void);
    use the peephole2 pattern.  */
 
 static int
-arc_sched_adjust_priority (rtx insn, int priority)
+arc_sched_adjust_priority (rtx_insn *insn, int priority)
 {
   rtx set = single_set (insn);
   if (set
@@ -5720,7 +5720,7 @@ arc_can_use_doloop_p (const widest_int &iterations, const widest_int &,
    Otherwise return why doloop cannot be applied.  */
 
 static const char *
-arc_invalid_within_doloop (const_rtx insn)
+arc_invalid_within_doloop (const rtx_insn *insn)
 {
   if (CALL_P (insn))
     return "Function call in the loop.";
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 11e0655ca67..165d7367a64 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -137,7 +137,7 @@ static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT);
 static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
 static int arm_comp_type_attributes (const_tree, const_tree);
 static void arm_set_default_type_attributes (tree);
-static int arm_adjust_cost (rtx, rtx, rtx, int);
+static int arm_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int arm_sched_reorder (FILE *, int, rtx_insn **, int *, int);
 static int optimal_immediate_sequence (enum rtx_code code,
 				       unsigned HOST_WIDE_INT val,
@@ -216,7 +216,7 @@ static bool arm_return_in_msb (const_tree);
 static bool arm_must_pass_in_stack (enum machine_mode, const_tree);
 static bool arm_return_in_memory (const_tree, const_tree);
 #if ARM_UNWIND_INFO
-static void arm_unwind_emit (FILE *, rtx);
+static void arm_unwind_emit (FILE *, rtx_insn *);
 static bool arm_output_ttype (rtx);
 static void arm_asm_emit_except_personality (rtx);
 static void arm_asm_init_sections (void);
@@ -238,7 +238,7 @@ static void arm_expand_builtin_va_start (tree, rtx);
 static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
 static void arm_option_override (void);
 static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);
-static bool arm_cannot_copy_insn_p (rtx);
+static bool arm_cannot_copy_insn_p (rtx_insn *);
 static int arm_issue_rate (void);
 static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
 static bool arm_output_addr_const_extra (FILE *, rtx);
@@ -11886,7 +11886,7 @@ arm_sched_reorder (FILE *file, int verbose, rtx_insn **ready, int *n_readyp,
    adjust_cost function. Only put bits of code into arm_adjust_cost that
    are common across all cores.  */
 static int
-arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
+arm_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
 {
   rtx i_pat, d_pat;
 
@@ -13115,7 +13115,7 @@ arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED)
 }
 
 static bool
-arm_cannot_copy_insn_p (rtx insn)
+arm_cannot_copy_insn_p (rtx_insn *insn)
 {
   /* The tls call insn cannot be copied, as it is paired with a data
      word.  */
@@ -29353,7 +29353,7 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p)
 /* Emit unwind directives for the given insn.  */
 
 static void
-arm_unwind_emit (FILE * asm_out_file, rtx insn)
+arm_unwind_emit (FILE * asm_out_file, rtx_insn *insn)
 {
   rtx note, pat;
   bool handled_one = false;
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index c9f9af6d4cd..8fb50dadf54 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3310,7 +3310,7 @@ bfin_issue_rate (void)
 }
 
 static int
-bfin_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+bfin_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type dep_insn_type;
   int dep_insn_code_number;
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index 0977fbcde54..8422756137b 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -3982,7 +3982,8 @@ c6x_sched_init (FILE *dump ATTRIBUTE_UNUSED,
 
 static int
 c6x_dfa_new_cycle (FILE *dump ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		   rtx insn ATTRIBUTE_UNUSED, int last_clock ATTRIBUTE_UNUSED,
+		   rtx_insn *insn ATTRIBUTE_UNUSED,
+		   int last_clock ATTRIBUTE_UNUSED,
 		   int clock ATTRIBUTE_UNUSED, int *sort_p ATTRIBUTE_UNUSED)
 {
   if (clock != last_clock)
@@ -4358,11 +4359,11 @@ maybe_clobber_cond (rtx insn, int clock_var)
 static int
 c6x_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 		    int sched_verbose ATTRIBUTE_UNUSED,
-		    rtx insn, int can_issue_more ATTRIBUTE_UNUSED)
+		    rtx_insn *insn, int can_issue_more ATTRIBUTE_UNUSED)
 {
   ss.last_scheduled_insn = insn;
   if (INSN_UID (insn) < sploop_max_uid_iter0 && !JUMP_P (insn))
-    ss.last_scheduled_iter0 = as_a <rtx_insn *> (insn);
+    ss.last_scheduled_iter0 = insn;
   if (GET_CODE (PATTERN (insn)) != USE && GET_CODE (PATTERN (insn)) != CLOBBER)
     ss.issued_this_cycle++;
   if (insn_info.exists ())
@@ -4465,7 +4466,7 @@ c6x_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
    anti- and output dependencies.  */
 
 static int
-c6x_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+c6x_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type = TYPE_UNKNOWN, dep_insn_type = TYPE_UNKNOWN;
   int dep_insn_code_number, insn_code_number;
diff --git a/gcc/config/epiphany/epiphany-protos.h b/gcc/config/epiphany/epiphany-protos.h
index a40cb58c2e4..8340c2aad84 100644
--- a/gcc/config/epiphany/epiphany-protos.h
+++ b/gcc/config/epiphany/epiphany-protos.h
@@ -45,8 +45,8 @@ extern void emit_set_fp_mode (int entity, int mode, int prev_mode,
 #endif
 extern void epiphany_insert_mode_switch_use (rtx insn, int, int);
 extern void epiphany_expand_set_fp_mode (rtx *operands);
-extern int epiphany_mode_needed (int entity, rtx insn);
-extern int epiphany_mode_after (int entity, int last_mode, rtx insn);
+extern int epiphany_mode_needed (int entity, rtx_insn *insn);
+extern int epiphany_mode_after (int entity, int last_mode, rtx_insn *insn);
 extern bool epiphany_epilogue_uses (int regno);
 extern bool epiphany_optimize_mode_switching (int entity);
 extern bool epiphany_is_interrupt_p (tree);
diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c
index 792475ff86b..93030e5dc46 100644
--- a/gcc/config/epiphany/epiphany.c
+++ b/gcc/config/epiphany/epiphany.c
@@ -1986,7 +1986,7 @@ epiphany_issue_rate (void)
    the same cost as a data-dependence.  The return value should be
    the new value for COST.  */
 static int
-epiphany_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+epiphany_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   if (REG_NOTE_KIND (link) == 0)
     {
@@ -2385,7 +2385,7 @@ epiphany_mode_priority (int entity, int priority)
 }
 
 int
-epiphany_mode_needed (int entity, rtx insn)
+epiphany_mode_needed (int entity, rtx_insn *insn)
 {
   enum attr_fp_mode mode;
 
@@ -2483,7 +2483,7 @@ epiphany_mode_entry_exit (int entity, bool exit)
 }
 
 int
-epiphany_mode_after (int entity, int last_mode, rtx insn)
+epiphany_mode_after (int entity, int last_mode, rtx_insn *insn)
 {
   /* We have too few call-saved registers to hope to keep the masks across
      calls.  */
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 0670962b940..bc089853e0f 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -260,7 +260,7 @@ extern void i386_pe_record_stub (const char *);
 
 extern void i386_pe_seh_init (FILE *);
 extern void i386_pe_seh_end_prologue (FILE *);
-extern void i386_pe_seh_unwind_emit (FILE *, rtx);
+extern void i386_pe_seh_unwind_emit (FILE *, rtx_insn *);
 extern void i386_pe_seh_emit_except_personality (rtx);
 extern void i386_pe_seh_init_sections (void);
 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3c7be0fc5dc..61b33782725 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5833,7 +5833,7 @@ ix86_return_pops_args (tree fundecl, tree funtype, int size)
 /* Implement the TARGET_LEGITIMATE_COMBINED_INSN hook.  */
 
 static bool
-ix86_legitimate_combined_insn (rtx insn)
+ix86_legitimate_combined_insn (rtx_insn *insn)
 {
   /* Check operand constraints in case hard registers were propagated
      into insn pattern.  This check prevents combine pass from
@@ -16104,7 +16104,7 @@ ix86_check_avx256_register (rtx *pexp, void *)
 /* Return needed mode for entity in optimize_mode_switching pass.  */
 
 static int
-ix86_avx_u128_mode_needed (rtx insn)
+ix86_avx_u128_mode_needed (rtx_insn *insn)
 {
   if (CALL_P (insn))
     {
@@ -16142,7 +16142,7 @@ ix86_avx_u128_mode_needed (rtx insn)
    prior to the execution of insn.  */
 
 static int
-ix86_i387_mode_needed (int entity, rtx insn)
+ix86_i387_mode_needed (int entity, rtx_insn *insn)
 {
   enum attr_i387_cw mode;
 
@@ -16195,7 +16195,7 @@ ix86_i387_mode_needed (int entity, rtx insn)
    prior to the execution of insn.  */
 
 static int
-ix86_mode_needed (int entity, rtx insn)
+ix86_mode_needed (int entity, rtx_insn *insn)
 {
   switch (entity)
     {
@@ -16227,7 +16227,7 @@ ix86_check_avx256_stores (rtx dest, const_rtx, void *data)
 /* Calculate mode of upper 128bit AVX registers after the insn.  */
 
 static int
-ix86_avx_u128_mode_after (int mode, rtx insn)
+ix86_avx_u128_mode_after (int mode, rtx_insn *insn)
 {
   rtx pat = PATTERN (insn);
 
@@ -16254,7 +16254,7 @@ ix86_avx_u128_mode_after (int mode, rtx insn)
 /* Return the mode that an insn results in.  */
 
 int
-ix86_mode_after (int entity, int mode, rtx insn)
+ix86_mode_after (int entity, int mode, rtx_insn *insn)
 {
   switch (entity)
     {
@@ -25556,7 +25556,7 @@ exact_store_load_dependency (rtx store, rtx load)
 }
 
 static int
-ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+ix86_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type, dep_insn_type;
   enum attr_memory memory;
@@ -25834,7 +25834,7 @@ ix86_macro_fusion_p ()
    "Intel Architectures Optimization Reference Manual". */
 
 static bool
-ix86_macro_fusion_pair_p (rtx condgen, rtx condjmp)
+ix86_macro_fusion_pair_p (rtx_insn *condgen, rtx_insn *condjmp)
 {
   rtx src, dest;
   rtx single_set = single_set (condgen);
@@ -26333,7 +26333,7 @@ ix86_dependencies_evaluation_hook (rtx_insn *head, rtx_insn *tail)
    moves from function argument registers at the top of the function entry
    and moves from function return value registers after call.  */
 static int
-ix86_adjust_priority (rtx insn, int priority)
+ix86_adjust_priority (rtx_insn *insn, int priority)
 {
   rtx set;
 
@@ -26472,7 +26472,7 @@ core2i7_first_cycle_multipass_begin (void *_data,
 static void
 core2i7_first_cycle_multipass_issue (void *_data,
 				     signed char *ready_try, int n_ready,
-				     rtx insn, const void *_prev_data)
+				     rtx_insn *insn, const void *_prev_data)
 {
   ix86_first_cycle_multipass_data_t data
     = (ix86_first_cycle_multipass_data_t) _data;
@@ -46451,7 +46451,7 @@ debug_ready_dispatch (void)
 /* This routine is the driver of the dispatch scheduler.  */
 
 static void
-do_dispatch (rtx insn, int mode)
+do_dispatch (rtx_insn *insn, int mode)
 {
   if (mode == DISPATCH_INIT)
     init_dispatch_sched ();
@@ -46462,7 +46462,7 @@ do_dispatch (rtx insn, int mode)
 /* Return TRUE if Dispatch Scheduling is supported.  */
 
 static bool
-has_dispatch (rtx insn, int action)
+has_dispatch (rtx_insn *insn, int action)
 {
   if ((TARGET_BDVER1 || TARGET_BDVER2 || TARGET_BDVER3 || TARGET_BDVER4)
       && flag_dispatch_scheduler)
diff --git a/gcc/config/i386/winnt.c b/gcc/config/i386/winnt.c
index a9ca2fd2aca..f1153d10102 100644
--- a/gcc/config/i386/winnt.c
+++ b/gcc/config/i386/winnt.c
@@ -1149,7 +1149,7 @@ seh_frame_related_expr (FILE *f, struct seh_frame_state *seh, rtx pat)
    required for unwind of this insn.  */
 
 void
-i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx insn)
+i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx_insn *insn)
 {
   rtx note, pat;
   bool handled_one = false;
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 5504da992e9..39cf17c9cef 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -169,8 +169,8 @@ static int ia64_first_cycle_multipass_dfa_lookahead (void);
 static void ia64_dependencies_evaluation_hook (rtx_insn *, rtx_insn *);
 static void ia64_init_dfa_pre_cycle_insn (void);
 static rtx ia64_dfa_pre_cycle_insn (void);
-static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx, int);
-static int ia64_dfa_new_cycle (FILE *, int, rtx, int, int, int *);
+static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *, int);
+static int ia64_dfa_new_cycle (FILE *, int, rtx_insn *, int, int, int *);
 static void ia64_h_i_d_extended (void);
 static void * ia64_alloc_sched_context (void);
 static void ia64_init_sched_context (void *, bool);
@@ -179,12 +179,12 @@ static void ia64_clear_sched_context (void *);
 static void ia64_free_sched_context (void *);
 static int ia64_mode_to_int (enum machine_mode);
 static void ia64_set_sched_flags (spec_info_t);
-static ds_t ia64_get_insn_spec_ds (rtx);
-static ds_t ia64_get_insn_checked_ds (rtx);
+static ds_t ia64_get_insn_spec_ds (rtx_insn *);
+static ds_t ia64_get_insn_checked_ds (rtx_insn *);
 static bool ia64_skip_rtx_p (const_rtx);
-static int ia64_speculate_insn (rtx, ds_t, rtx *);
+static int ia64_speculate_insn (rtx_insn *, ds_t, rtx *);
 static bool ia64_needs_block_p (ds_t);
-static rtx ia64_gen_spec_check (rtx, rtx, ds_t);
+static rtx ia64_gen_spec_check (rtx_insn *, rtx_insn *, ds_t);
 static int ia64_spec_check_p (rtx);
 static int ia64_spec_check_src_p (rtx);
 static rtx gen_tls_get_addr (void);
@@ -250,7 +250,7 @@ static void ia64_print_operand_address (FILE *, rtx);
 static bool ia64_print_operand_punct_valid_p (unsigned char code);
 
 static int ia64_issue_rate (void);
-static int ia64_adjust_cost_2 (rtx, int, rtx, int, dw_t);
+static int ia64_adjust_cost_2 (rtx_insn *, int, rtx_insn *, int, dw_t);
 static void ia64_sched_init (FILE *, int, int);
 static void ia64_sched_init_global (FILE *, int, int);
 static void ia64_sched_finish_global (FILE *, int);
@@ -258,9 +258,9 @@ static void ia64_sched_finish (FILE *, int);
 static int ia64_dfa_sched_reorder (FILE *, int, rtx_insn **, int *, int, int);
 static int ia64_sched_reorder (FILE *, int, rtx_insn **, int *, int);
 static int ia64_sched_reorder2 (FILE *, int, rtx_insn **, int *, int);
-static int ia64_variable_issue (FILE *, int, rtx, int);
+static int ia64_variable_issue (FILE *, int, rtx_insn *, int);
 
-static void ia64_asm_unwind_emit (FILE *, rtx);
+static void ia64_asm_unwind_emit (FILE *, rtx_insn *);
 static void ia64_asm_emit_except_personality (rtx);
 static void ia64_asm_init_sections (void);
 
@@ -632,7 +632,7 @@ static const struct attribute_spec ia64_attribute_table[] =
 #undef TARGET_CAN_USE_DOLOOP_P
 #define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
 #undef TARGET_INVALID_WITHIN_DOLOOP
-#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_null
+#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_insn_null
 
 #undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE
 #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE ia64_override_options_after_change
@@ -7177,7 +7177,8 @@ ia64_single_set (rtx insn)
    Return the new cost of a dependency of type DEP_TYPE or INSN on DEP_INSN.
    COST is the current cost, DW is dependency weakness.  */
 static int
-ia64_adjust_cost_2 (rtx insn, int dep_type1, rtx dep_insn, int cost, dw_t dw)
+ia64_adjust_cost_2 (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn,
+		    int cost, dw_t dw)
 {
   enum reg_note dep_type = (enum reg_note) dep_type1;
   enum attr_itanium_class dep_class;
@@ -7498,7 +7499,7 @@ ia64_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 static int
 ia64_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 		     int sched_verbose ATTRIBUTE_UNUSED,
-		     rtx insn ATTRIBUTE_UNUSED,
+		     rtx_insn *insn,
 		     int can_issue_more ATTRIBUTE_UNUSED)
 {
   if (sched_deps_info->generate_spec_deps && !sel_sched_p ())
@@ -7535,7 +7536,7 @@ ia64_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
    can be chosen.  */
 
 static int
-ia64_first_cycle_multipass_dfa_lookahead_guard (rtx insn, int ready_index)
+ia64_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *insn, int ready_index)
 {
   gcc_assert (insn && INSN_P (insn));
 
@@ -7588,7 +7589,7 @@ scheduled_good_insn (rtx last)
    the ready queue on the next clock start.  */
 
 static int
-ia64_dfa_new_cycle (FILE *dump, int verbose, rtx insn, int last_clock,
+ia64_dfa_new_cycle (FILE *dump, int verbose, rtx_insn *insn, int last_clock,
 		    int clock, int *sort_p)
 {
   gcc_assert (insn && INSN_P (insn));
@@ -8112,7 +8113,7 @@ get_insn_spec_code (const_rtx insn)
 /* If INSN is a speculative load, return a ds with the speculation types.
    Otherwise [if INSN is a normal instruction] return 0.  */
 static ds_t
-ia64_get_insn_spec_ds (rtx insn)
+ia64_get_insn_spec_ds (rtx_insn *insn)
 {
   int code = get_insn_spec_code (insn);
 
@@ -8137,7 +8138,7 @@ ia64_get_insn_spec_ds (rtx insn)
    will be checked.
    Otherwise [if INSN is a normal instruction] return 0.  */
 static ds_t
-ia64_get_insn_checked_ds (rtx insn)
+ia64_get_insn_checked_ds (rtx_insn *insn)
 {
   int code = get_insn_spec_code (insn);
 
@@ -8195,7 +8196,7 @@ insn_can_be_in_speculative_p (rtx insn ATTRIBUTE_UNUSED,
    If current pattern of the INSN already provides TS speculation,
    return 0.  */
 static int
-ia64_speculate_insn (rtx insn, ds_t ts, rtx *new_pat)
+ia64_speculate_insn (rtx_insn *insn, ds_t ts, rtx *new_pat)
 {  
   int mode_no;
   int res;
@@ -8370,7 +8371,7 @@ ia64_needs_block_p (ds_t ts)
 
 /* Generate (or regenerate) a recovery check for INSN.  */
 static rtx
-ia64_gen_spec_check (rtx insn, rtx label, ds_t ds)
+ia64_gen_spec_check (rtx_insn *insn, rtx_insn *label, ds_t ds)
 {
   rtx op1, pat, check_pat;
   gen_func_t gen_check;
@@ -10178,7 +10179,7 @@ process_cfa_offset (FILE *asm_out_file, rtx pat, bool unwind)
    required to unwind this insn.  */
 
 static void
-ia64_asm_unwind_emit (FILE *asm_out_file, rtx insn)
+ia64_asm_unwind_emit (FILE *asm_out_file, rtx_insn *insn)
 {
   bool unwind = ia64_except_unwind_info (&global_options) == UI_TARGET;
   bool frame = dwarf2out_do_frame ();
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 35c136edb99..aadbce19a20 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -76,7 +76,7 @@ static void  m32r_output_function_epilogue (FILE *, HOST_WIDE_INT);
 
 static void  m32r_file_start (void);
 
-static int    m32r_adjust_priority (rtx, int);
+static int    m32r_adjust_priority (rtx_insn *, int);
 static int    m32r_issue_rate (void);
 
 static void m32r_encode_section_info (tree, rtx, int);
@@ -1322,7 +1322,7 @@ m32r_is_insn (rtx insn)
    short instructions are scheduled ahead of the long ones.  */
 
 static int
-m32r_adjust_priority (rtx insn, int priority)
+m32r_adjust_priority (rtx_insn *insn, int priority)
 {
   if (m32r_is_insn (insn)
       && get_attr_insn_size (insn) != INSN_SIZE_SHORT)
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 7d5ab080f1c..779908d1c0e 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -125,9 +125,9 @@ struct m68k_address {
   int scale;
 };
 
-static int m68k_sched_adjust_cost (rtx, rtx, rtx, int);
+static int m68k_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int m68k_sched_issue_rate (void);
-static int m68k_sched_variable_issue (FILE *, int, rtx, int);
+static int m68k_sched_variable_issue (FILE *, int, rtx_insn *, int);
 static void m68k_sched_md_init_global (FILE *, int, int);
 static void m68k_sched_md_finish_global (FILE *, int);
 static void m68k_sched_md_init (FILE *, int, int);
@@ -5921,8 +5921,8 @@ static state_t sched_adjust_cost_state;
 /* Implement adjust_cost scheduler hook.
    Return adjusted COST of dependency LINK between DEF_INSN and INSN.  */
 static int
-m68k_sched_adjust_cost (rtx insn, rtx link ATTRIBUTE_UNUSED, rtx def_insn,
-			int cost)
+m68k_sched_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
+			rtx_insn *def_insn, int cost)
 {
   int delay;
 
@@ -6032,7 +6032,7 @@ static int sched_mem_unit_code;
 static int
 m68k_sched_variable_issue (FILE *sched_dump ATTRIBUTE_UNUSED,
 			   int sched_verbose ATTRIBUTE_UNUSED,
-			   rtx insn, int can_issue_more)
+			   rtx_insn *insn, int can_issue_more)
 {
   int insn_size;
 
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index 710a9b4ebd5..3c71b9574a9 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -218,7 +218,7 @@ static rtx mep_convert_regnum (const struct cgen_regnum_operand *, rtx);
 static rtx mep_legitimize_arg (const struct insn_operand_data *, rtx, int);
 static void mep_incompatible_arg (const struct insn_operand_data *, rtx, int, tree);
 static rtx mep_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
-static int mep_adjust_cost (rtx, rtx, rtx, int);
+static int mep_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int mep_issue_rate (void);
 static rtx_insn *mep_find_ready_insn (rtx_insn **, int, enum attr_slot, int);
 static void mep_move_ready_insn (rtx_insn **, int, rtx_insn *);
@@ -6477,7 +6477,7 @@ global_reg_mentioned_p (rtx x)
    insns.  Not implemented.  */
 
 static int
-mep_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+mep_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   int cost_specified;
 
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index 15047401612..b08a6d503f6 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -3529,8 +3529,8 @@ microblaze_function_value (const_tree valtype,
 
 /* Implement TARGET_SCHED_ADJUST_COST.  */
 static int
-microblaze_adjust_cost (rtx insn ATTRIBUTE_UNUSED, rtx link,
-			rtx dep ATTRIBUTE_UNUSED, int cost)
+microblaze_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
+			rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
 {
   if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
     return cost;
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index b4b1270514c..9d5b996ecfc 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -13133,8 +13133,8 @@ static struct
    is treated like input-dependence.  */
 
 static int
-mips_adjust_cost (rtx insn ATTRIBUTE_UNUSED, rtx link,
-		  rtx dep ATTRIBUTE_UNUSED, int cost)
+mips_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
+		  rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
 {
   if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT
       && TUNE_20KC)
@@ -13670,7 +13670,7 @@ mips_ls2_variable_issue (rtx insn)
 
 static int
 mips_variable_issue (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		     rtx insn, int more)
+		     rtx_insn *insn, int more)
 {
   /* Ignore USEs and CLOBBERs; don't count them against the issue rate.  */
   if (USEFUL_INSN_P (insn))
@@ -17590,7 +17590,7 @@ mips_final_prescan_insn (rtx_insn *insn, rtx *opvec, int noperands)
 /* Implement TARGET_ASM_FINAL_POSTSCAN_INSN.  */
 
 static void
-mips_final_postscan_insn (FILE *file ATTRIBUTE_UNUSED, rtx insn,
+mips_final_postscan_insn (FILE *file ATTRIBUTE_UNUSED, rtx_insn *insn,
 			  rtx *opvec, int noperands)
 {
   if (mips_need_noat_wrapper_p (insn, opvec, noperands))
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index ca79f6d16ac..8ecd26be1be 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -2760,7 +2760,7 @@ set_is_store_p (rtx set)
    COST is the current cycle cost for DEP.  */
 
 static int
-mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
+mn10300_adjust_sched_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
 {
   rtx insn_set;
   rtx dep_set;
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 81494414af3..40986908352 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -117,8 +117,8 @@ static bool pa_function_value_regno_p (const unsigned int);
 static void pa_output_function_prologue (FILE *, HOST_WIDE_INT);
 static void update_total_code_bytes (unsigned int);
 static void pa_output_function_epilogue (FILE *, HOST_WIDE_INT);
-static int pa_adjust_cost (rtx, rtx, rtx, int);
-static int pa_adjust_priority (rtx, int);
+static int pa_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
+static int pa_adjust_priority (rtx_insn *, int);
 static int pa_issue_rate (void);
 static void pa_som_asm_init_sections (void) ATTRIBUTE_UNUSED;
 static section *pa_som_tm_clone_table_section (void) ATTRIBUTE_UNUSED;
@@ -4647,7 +4647,7 @@ pa_emit_bcond_fp (rtx operands[])
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-pa_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+pa_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type attr_type;
 
@@ -4836,7 +4836,7 @@ pa_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 /* Adjust scheduling priorities.  We use this to try and keep addil
    and the next use of %r1 close together.  */
 static int
-pa_adjust_priority (rtx insn, int priority)
+pa_adjust_priority (rtx_insn *insn, int priority)
 {
   rtx set = single_set (insn);
   rtx src, dest;
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index ff2b6abbc59..7d603d02285 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -98,8 +98,8 @@ unsigned int picochip_function_arg_boundary (enum machine_mode mode,
 
 int picochip_sched_lookahead (void);
 int picochip_sched_issue_rate (void);
-int picochip_sched_adjust_cost (rtx insn, rtx link,
-				       rtx dep_insn, int cost);
+int picochip_sched_adjust_cost (rtx_insn *insn, rtx link,
+				rtx_insn *dep_insn, int cost);
 int picochip_sched_reorder (FILE * file, int verbose, rtx_insn ** ready,
 				   int *n_readyp, int clock);
 
@@ -3535,7 +3535,8 @@ picochip_sched_issue_rate (void)
 /* Adjust the scheduling cost between the two given instructions,
    which have the given dependency. */
 int
-picochip_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+picochip_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			    int cost)
 {
 
   if (TARGET_DEBUG)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 3fce3a328df..5199bee6d89 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1076,7 +1076,7 @@ static int rs6000_memory_move_cost (enum machine_mode, reg_class_t, bool);
 static bool rs6000_debug_rtx_costs (rtx, int, int, int, int *, bool);
 static int rs6000_debug_address_cost (rtx, enum machine_mode, addr_space_t,
 				      bool);
-static int rs6000_debug_adjust_cost (rtx, rtx, rtx, int);
+static int rs6000_debug_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static bool is_microcoded_insn (rtx);
 static bool is_nonpipeline_insn (rtx);
 static bool is_cracked_insn (rtx);
@@ -26328,7 +26328,7 @@ static int load_store_pendulum;
    instructions to issue in this cycle.  */
 
 static int
-rs6000_variable_issue_1 (rtx insn, int more)
+rs6000_variable_issue_1 (rtx_insn *insn, int more)
 {
   last_scheduled_insn = insn;
   if (GET_CODE (PATTERN (insn)) == USE
@@ -26368,7 +26368,7 @@ rs6000_variable_issue_1 (rtx insn, int more)
 }
 
 static int
-rs6000_variable_issue (FILE *stream, int verbose, rtx insn, int more)
+rs6000_variable_issue (FILE *stream, int verbose, rtx_insn *insn, int more)
 {
   int r = rs6000_variable_issue_1 (insn, more);
   if (verbose)
@@ -26380,7 +26380,7 @@ rs6000_variable_issue (FILE *stream, int verbose, rtx insn, int more)
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+rs6000_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type attr_type;
 
@@ -26649,7 +26649,8 @@ rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 /* Debug version of rs6000_adjust_cost.  */
 
 static int
-rs6000_debug_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+rs6000_debug_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			  int cost)
 {
   int ret = rs6000_adjust_cost (insn, link, dep_insn, cost);
 
@@ -26874,7 +26875,7 @@ mem_locations_overlap (rtx mem1, rtx mem2)
    priorities of insns.  */
 
 static int
-rs6000_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
+rs6000_adjust_priority (rtx_insn *insn ATTRIBUTE_UNUSED, int priority)
 {
   rtx load_mem, str_mem;
   /* On machines (like the 750) which have asymmetric integer units,
@@ -27037,7 +27038,7 @@ rs6000_use_sched_lookahead (void)
 /* We are choosing insn from the ready queue.  Return zero if INSN can be
    chosen.  */
 static int
-rs6000_use_sched_lookahead_guard (rtx insn, int ready_index)
+rs6000_use_sched_lookahead_guard (rtx_insn *insn, int ready_index)
 {
   if (ready_index == 0)
     return 0;
@@ -27219,17 +27220,17 @@ rs6000_is_costly_dependence (dep_t dep, int cost, int distance)
    skipping any "non-active" insns - insns that will not actually occupy
    an issue slot.  Return NULL_RTX if such an insn is not found.  */
 
-static rtx
-get_next_active_insn (rtx insn, rtx tail)
+static rtx_insn *
+get_next_active_insn (rtx_insn *insn, rtx_insn *tail)
 {
   if (insn == NULL_RTX || insn == tail)
-    return NULL_RTX;
+    return NULL;
 
   while (1)
     {
       insn = NEXT_INSN (insn);
       if (insn == NULL_RTX || insn == tail)
-	return NULL_RTX;
+	return NULL;
 
       if (CALL_P (insn)
 	  || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
@@ -28002,9 +28003,10 @@ force_new_group (int sched_verbose, FILE *dump, rtx *group_insns,
      start a new group.  */
 
 static int
-redefine_groups (FILE *dump, int sched_verbose, rtx prev_head_insn, rtx tail)
+redefine_groups (FILE *dump, int sched_verbose, rtx_insn *prev_head_insn,
+		 rtx_insn *tail)
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   int issue_rate;
   int can_issue_more;
   int slot, i;
@@ -28079,9 +28081,10 @@ redefine_groups (FILE *dump, int sched_verbose, rtx prev_head_insn, rtx tail)
    returns the number of dispatch groups found.  */
 
 static int
-pad_groups (FILE *dump, int sched_verbose, rtx prev_head_insn, rtx tail)
+pad_groups (FILE *dump, int sched_verbose, rtx_insn *prev_head_insn,
+	    rtx_insn *tail)
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   rtx nop;
   int issue_rate;
   int can_issue_more;
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 2a8f70aa986..097ed6ae573 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -5864,7 +5864,7 @@ s390_agen_dep_p (rtx dep_insn, rtx insn)
    A STD instruction should be scheduled earlier,
    in order to use the bypass.  */
 static int
-s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
+s390_adjust_priority (rtx_insn *insn, int priority)
 {
   if (! INSN_P (insn))
     return priority;
@@ -6540,7 +6540,7 @@ s390_execute_target (rtx insn)
    execute insns that carry a unique label.  */
 
 static bool
-s390_cannot_copy_insn_p (rtx insn)
+s390_cannot_copy_insn_p (rtx_insn *insn)
 {
   rtx label = s390_execute_label (insn);
   return label && label != const0_rtx;
@@ -11712,9 +11712,8 @@ s390_sched_reorder (FILE *file, int verbose,
    last_scheduled_insn in order to make it available for
    s390_sched_reorder.  */
 static int
-s390_sched_variable_issue (FILE *file, int verbose, rtx uncast_insn, int more)
+s390_sched_variable_issue (FILE *file, int verbose, rtx_insn *insn, int more)
 {
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   last_scheduled_insn = insn;
 
   if (s390_tune == PROCESSOR_2827_ZEC12
@@ -12184,7 +12183,7 @@ s390_option_override (void)
 #define TARGET_CC_MODES_COMPATIBLE s390_cc_modes_compatible
 
 #undef TARGET_INVALID_WITHIN_DOLOOP
-#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_null
+#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_insn_null
 
 #ifdef HAVE_AS_TLS
 #undef TARGET_ASM_OUTPUT_DWARF_DTPREL
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index d2eb34d5271..ec3b200f364 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -203,8 +203,8 @@ static int calc_live_regs (HARD_REG_SET *);
 static HOST_WIDE_INT rounded_frame_size (int);
 static bool sh_frame_pointer_required (void);
 static void sh_emit_mode_set (int, int, int, HARD_REG_SET);
-static int sh_mode_needed (int, rtx);
-static int sh_mode_after (int, int, rtx);
+static int sh_mode_needed (int, rtx_insn *);
+static int sh_mode_after (int, int, rtx_insn *);
 static int sh_mode_entry (int);
 static int sh_mode_exit (int);
 static int sh_mode_priority (int entity, int n);
@@ -227,9 +227,9 @@ static void sh_output_function_epilogue (FILE *, HOST_WIDE_INT);
 static void sh_insert_attributes (tree, tree *);
 static const char *sh_check_pch_target_flags (int);
 static int sh_register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
-static int sh_adjust_cost (rtx, rtx, rtx, int);
+static int sh_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int sh_issue_rate (void);
-static int sh_dfa_new_cycle (FILE *, int, rtx, int, int, int *sort_p);
+static int sh_dfa_new_cycle (FILE *, int, rtx_insn *, int, int, int *sort_p);
 static short find_set_regmode_weight (rtx, enum machine_mode);
 static short find_insn_regmode_weight (rtx, enum machine_mode);
 static void find_regmode_weight (basic_block, enum machine_mode);
@@ -243,7 +243,7 @@ static bool high_pressure (enum machine_mode);
 static int sh_reorder (FILE *, int, rtx_insn **, int *, int);
 static int sh_reorder2 (FILE *, int, rtx_insn **, int *, int);
 static void sh_md_init (FILE *, int, int);
-static int sh_variable_issue (FILE *, int, rtx, int);
+static int sh_variable_issue (FILE *, int, rtx_insn *, int);
 
 static bool sh_function_ok_for_sibcall (tree, tree);
 
@@ -265,7 +265,7 @@ static int and_xor_ior_costs (rtx, int);
 static int addsubcosts (rtx);
 static int multcosts (rtx);
 static bool unspec_caller_rtx_p (rtx);
-static bool sh_cannot_copy_insn_p (rtx);
+static bool sh_cannot_copy_insn_p (rtx_insn *);
 static bool sh_rtx_costs (rtx, int, int, int, int *, bool);
 static int sh_address_cost (rtx, enum machine_mode, addr_space_t, bool);
 static int sh_pr_n_sets (void);
@@ -2948,7 +2948,7 @@ unspec_caller_rtx_p (rtx pat)
 /* Indicate that INSN cannot be duplicated.  This is true for insn
    that generates a unique label.  */
 static bool
-sh_cannot_copy_insn_p (rtx insn)
+sh_cannot_copy_insn_p (rtx_insn *insn)
 {
   rtx pat;
 
@@ -10784,7 +10784,8 @@ sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
    the same cost as a data-dependence.  The return value should be
    the new value for COST.  */
 static int
-sh_adjust_cost (rtx insn, rtx link ATTRIBUTE_UNUSED, rtx dep_insn, int cost)
+sh_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
+		rtx_insn *dep_insn, int cost)
 {
   rtx reg, use_pat;
 
@@ -11272,7 +11273,7 @@ sh_scalar_mode_supported_p (enum machine_mode mode)
 static int
 sh_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 		   int sched_verbose ATTRIBUTE_UNUSED,
-		   rtx insn,
+		   rtx_insn *insn,
 		   int can_issue_more)
 {
   if (GET_CODE (PATTERN (insn)) != USE
@@ -11369,7 +11370,7 @@ sh_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 static int
 sh_dfa_new_cycle (FILE *sched_dump ATTRIBUTE_UNUSED,
 		  int sched_verbose ATTRIBUTE_UNUSED,
-		  rtx insn ATTRIBUTE_UNUSED,
+		  rtx_insn *insn ATTRIBUTE_UNUSED,
 		  int last_clock_var,
 		  int clock_var,
 		  int *sort_p)
@@ -13630,13 +13631,13 @@ sh_emit_mode_set (int entity ATTRIBUTE_UNUSED, int mode,
 }
 
 static int
-sh_mode_needed (int entity ATTRIBUTE_UNUSED, rtx insn)
+sh_mode_needed (int entity ATTRIBUTE_UNUSED, rtx_insn *insn)
 {
   return recog_memoized (insn) >= 0  ? get_attr_fp_mode (insn) : FP_MODE_NONE;
 }
 
 static int
-sh_mode_after (int entity ATTRIBUTE_UNUSED, int mode, rtx insn)
+sh_mode_after (int entity ATTRIBUTE_UNUSED, int mode, rtx_insn *insn)
 {
   if (TARGET_HITACHI && recog_memoized (insn) >= 0 &&
       get_attr_fp_set (insn) != FP_SET_NONE)
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 7cf2619eed8..6d2d160b167 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -537,8 +537,8 @@ static void scan_record_type (const_tree, int *, int *, int *);
 static int function_arg_slotno (const CUMULATIVE_ARGS *, enum machine_mode,
 				const_tree, bool, bool, int *, int *);
 
-static int supersparc_adjust_cost (rtx, rtx, rtx, int);
-static int hypersparc_adjust_cost (rtx, rtx, rtx, int);
+static int supersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
+static int hypersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 
 static void sparc_emit_set_const32 (rtx, rtx);
 static void sparc_emit_set_const64 (rtx, rtx);
@@ -557,7 +557,7 @@ static void sparc_asm_function_epilogue (FILE *, HOST_WIDE_INT);
 static void sparc_solaris_elf_asm_named_section (const char *, unsigned int,
 						 tree) ATTRIBUTE_UNUSED;
 #endif
-static int sparc_adjust_cost (rtx, rtx, rtx, int);
+static int sparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int sparc_issue_rate (void);
 static void sparc_sched_init (FILE *, int, int);
 static int sparc_use_sched_lookahead (void);
@@ -9407,7 +9407,7 @@ sparc_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-supersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+supersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type;
 
@@ -9468,7 +9468,7 @@ supersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 }
 
 static int
-hypersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+hypersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type, dep_type;
   rtx pat = PATTERN(insn);
@@ -9545,7 +9545,7 @@ hypersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 }
 
 static int
-sparc_adjust_cost(rtx insn, rtx link, rtx dep, int cost)
+sparc_adjust_cost(rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
 {
   switch (sparc_cpu)
     {
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 5f17346f3f5..393bf4d6602 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2802,11 +2802,10 @@ spu_sched_init (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 static int
 spu_sched_variable_issue (FILE *file ATTRIBUTE_UNUSED,
 			  int verbose ATTRIBUTE_UNUSED,
-			  rtx uncast_insn, int more)
+			  rtx_insn *insn, int more)
 {
   int len;
   int p;
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   if (GET_CODE (PATTERN (insn)) == USE
       || GET_CODE (PATTERN (insn)) == CLOBBER
       || (len = get_attr_length (insn)) == 0)
@@ -3000,11 +2999,9 @@ spu_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 /* INSN is dependent on DEP_INSN. */
 static int
-spu_sched_adjust_cost (rtx uncast_insn, rtx link, rtx uncast_dep_insn, int cost)
+spu_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   rtx set;
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
-  rtx_insn *dep_insn = as_a <rtx_insn *> (uncast_dep_insn);
 
   /* The blockage pattern is used to prevent instructions from being
      moved across it and has no cost. */
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index c220622b32b..78025acc90c 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -4429,7 +4429,8 @@ get_jump_target (rtx branch)
 
 /* Implement TARGET_SCHED_ADJUST_COST.  */
 static int
-tilegx_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+tilegx_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			  int cost)
 {
   /* If we have a true dependence, INSN is a call, and DEP_INSN
      defines a register that is needed by the call (argument or stack
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index 853de6bedb1..2fc588b79fa 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -3955,7 +3955,8 @@ get_jump_target (rtx branch)
 
 /* Implement TARGET_SCHED_ADJUST_COST.  */
 static int
-tilepro_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+tilepro_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			   int cost)
 {
   /* If we have a true dependence, INSN is a call, and DEP_INSN
      defines a register that is needed by the call (argument or stack