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authorkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2007-02-04 00:51:14 +0000
committerkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2007-02-04 00:51:14 +0000
commit03fb0c81fe21e9a52366179e8549e13f00dd3ccb (patch)
tree0c04515384ec799f85831c86623ab9a595c3565f /gcc/config
parent98467bd897ac0b980a9f89298f02edd0f1a8037f (diff)
downloadgcc-03fb0c81fe21e9a52366179e8549e13f00dd3ccb.tar.gz
* config/h8300/h8300.c, config/h8300/h8300.h,
config/h8300/h8300.md: Follow spelling conventions. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@121562 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/h8300/h8300.c18
-rw-r--r--gcc/config/h8300/h8300.h6
-rw-r--r--gcc/config/h8300/h8300.md4
3 files changed, 14 insertions, 14 deletions
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 215fbe3b7f4..efc32af194b 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -1321,20 +1321,20 @@ h8300_rtx_costs (rtx x, int code, int outer_code, int *total)
If this operand isn't a register, fall back to 'R' handling.
'Z' print int & 7.
'c' print the opcode corresponding to rtl
- 'e' first word of 32 bit value - if reg, then least reg. if mem
+ 'e' first word of 32-bit value - if reg, then least reg. if mem
then least. if const then most sig word
- 'f' second word of 32 bit value - if reg, then biggest reg. if mem
+ 'f' second word of 32-bit value - if reg, then biggest reg. if mem
then +2. if const then least sig word
'j' print operand as condition code.
'k' print operand as reverse condition code.
'm' convert an integer operand to a size suffix (.b, .w or .l)
'o' print an integer without a leading '#'
- 's' print as low byte of 16 bit value
- 't' print as high byte of 16 bit value
- 'w' print as low byte of 32 bit value
- 'x' print as 2nd byte of 32 bit value
- 'y' print as 3rd byte of 32 bit value
- 'z' print as msb of 32 bit value
+ 's' print as low byte of 16-bit value
+ 't' print as high byte of 16-bit value
+ 'w' print as low byte of 32-bit value
+ 'x' print as 2nd byte of 32-bit value
+ 'y' print as 3rd byte of 32-bit value
+ 'z' print as msb of 32-bit value
*/
/* Return assembly language string which identifies a comparison type. */
@@ -1760,7 +1760,7 @@ print_operand_address (FILE *file, rtx addr)
case CONST_INT:
{
- /* Since the H8/300 only has 16 bit pointers, negative values are also
+ /* Since the H8/300 only has 16-bit pointers, negative values are also
those >= 32768. This happens for example with pointer minus a
constant. We don't want to turn (char *p - 2) into
(char *p + 65534) because loop unrolling can build upon this
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 7c9a2414bdf..98a954b972c 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -195,13 +195,13 @@ extern const char * const *h8_reg_names;
#define FUNCTION_BOUNDARY 16
/* Alignment of field after `int : 0' in a structure. */
-/* One can argue this should be 32 for -mint32, but since 32 bit ints only
- need 16 bit alignment, this is left as is so that -mint32 doesn't change
+/* One can argue this should be 32 for -mint32, but since 32-bit ints only
+ need 16-bit alignment, this is left as is so that -mint32 doesn't change
structure layouts. */
#define EMPTY_FIELD_BOUNDARY 16
/* No data type wants to be aligned rounder than this.
- 32 bit values are aligned as such on the H8/300H and H8S for speed. */
+ 32-bit values are aligned as such on the H8/300H and H8S for speed. */
#define BIGGEST_ALIGNMENT \
(((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 65fea7e13e0..8f0083ae8a1 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2826,7 +2826,7 @@
;; ----------------------------------------------------------------------
;;
;; We make some attempt to provide real efficient shifting. One example is
-;; doing an 8 bit shift of a 16 bit value by moving a byte reg into the other
+;; doing an 8-bit shift of a 16-bit value by moving a byte reg into the other
;; reg and moving 0 into the former reg.
;;
;; We also try to achieve this in a uniform way. IE: We don't try to achieve
@@ -2834,7 +2834,7 @@
;; give the optimizer more cracks at the code. However, we wish to do things
;; like optimizing shifting the sign bit to bit 0 by rotating the other way.
;; There is rtl to handle this (rotate + and), but the H8/300 doesn't handle
-;; 16 bit rotates. Also, if we emit complicated rtl, combine may not be able
+;; 16-bit rotates. Also, if we emit complicated rtl, combine may not be able
;; to detect cases it can optimize.
;;
;; For these and other fuzzy reasons, I've decided to go the less pretty but