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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2005-03-05 09:04:33 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2005-03-05 09:04:33 +0000
commit6f172a83801e2a9e1f54adde808a8c5edfecf74e (patch)
treed9f87649380ef70ac1c645f0ae8186d9180429eb /gcc/config
parent6c3e2b2fd78bc75a80a931b4b43e03261789cc7d (diff)
downloadgcc-6f172a83801e2a9e1f54adde808a8c5edfecf74e.tar.gz
* doc/invoke.texi: Document new MIPS -msym32 and -mno-sym32 options.
* config/mips/mips.h (MASK_SYM32, TARGET_SYM32): New macros. (TARGET_SWITCHES): Add -msym32 and -mno-sym32. (ABI_HAS_64BIT_SYMBOLS): Set to false if TARGET_SYM32. (ASM_SPEC): Pass down -msym32 and -mno-sym32. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@95926 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/mips/mips.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 559efb922fa..41328a34d65 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -164,6 +164,7 @@ extern const struct mips_cpu_info *mips_tune_info;
break instead of trap. */
#define MASK_PAIRED_SINGLE 0x10000000 /* Support paired-single FPU. */
#define MASK_MIPS3D 0x20000000 /* Support MIPS-3D instructions. */
+#define MASK_SYM32 0x40000000 /* Assume 32-bit symbol values. */
/* Debug switches, not documented */
#define MASK_DEBUG 0 /* unused */
@@ -242,6 +243,7 @@ extern const struct mips_cpu_info *mips_tune_info;
#define TARGET_PAIRED_SINGLE_FLOAT \
((target_flags & MASK_PAIRED_SINGLE) != 0)
#define TARGET_MIPS3D ((target_flags & MASK_MIPS3D) != 0)
+#define TARGET_SYM32 ((target_flags & MASK_SYM32) != 0)
/* True if we should use NewABI-style relocation operators for
symbolic addresses. This is never true for mips16 code,
@@ -669,6 +671,10 @@ extern const struct mips_cpu_info *mips_tune_info;
N_("FP exceptions are enabled") }, \
{"no-fp-exceptions", -MASK_FP_EXCEPTIONS, \
N_("FP exceptions are not enabled") }, \
+ {"sym32", MASK_SYM32, \
+ N_("Assume all symbols have 32-bit values") }, \
+ {"no-sym32", -MASK_SYM32, \
+ N_("Don't assume all symbols have 32-bit values") }, \
{"debug", MASK_DEBUG, \
NULL}, \
{"debugd", MASK_DEBUG_D, \
@@ -843,7 +849,7 @@ extern const struct mips_cpu_info *mips_tune_info;
/* True if symbols are 64 bits wide. At present, n64 is the only
ABI for which this is true. */
-#define ABI_HAS_64BIT_SYMBOLS (mips_abi == ABI_64)
+#define ABI_HAS_64BIT_SYMBOLS (mips_abi == ABI_64 && !TARGET_SYM32)
/* ISA has instructions for managing 64 bit fp and gp regs (e.g. mips3). */
#define ISA_HAS_64BIT_REGS (ISA_MIPS3 \
@@ -1093,6 +1099,7 @@ extern const struct mips_cpu_info *mips_tune_info;
%(subtarget_asm_debugging_spec) \
%{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
%{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
+%{msym32} %{mno-sym32} \
%{mtune=*} %{v} \
%(subtarget_asm_spec)"