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author | edlinger <edlinger@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-01 18:45:41 +0000 |
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committer | edlinger <edlinger@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-01 18:45:41 +0000 |
commit | 98b481a92d1c2e52ff0bda7c8c6f4af9210e0ef9 (patch) | |
tree | 48db2ab9dc8c20e9a7d3b8b661d671d57c1c2d9b /gcc/config | |
parent | 48aaffae32ab1e6f75761dd33b29ffd45f813ed1 (diff) | |
download | gcc-98b481a92d1c2e52ff0bda7c8c6f4af9210e0ef9.tar.gz |
PR target/68917
* config/tilegx/tilegx.md (clzsi2): Don't create DI subregs of
SI values. Explicitly convert SI to DI and vice-versa.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232028 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/tilegx/tilegx.md | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md index 944953c34b2..a2c1aef3975 100644 --- a/gcc/config/tilegx/tilegx.md +++ b/gcc/config/tilegx/tilegx.md @@ -1799,13 +1799,16 @@ (define_expand "clzsi2" [(set (match_dup 2) - (ashift:DI (match_operand:SI 1 "reg_or_0_operand" "") + (zero_extend:DI (match_operand:SI 1 "reg_or_0_operand" ""))) + (set (match_dup 2) + (ashift:DI (match_dup 2) (const_int 32))) - (set (subreg:DI (match_operand:SI 0 "register_operand" "") 0) - (clz:DI (match_dup 2)))] + (set (match_dup 2) + (clz:DI (match_dup 2))) + (set (match_operand:SI 0 "register_operand" "") + (subreg:SI (match_dup 2) 0))] "" { - operands[1] = simplify_gen_subreg (DImode, operands[1], SImode, 0); operands[2] = gen_reg_rtx (DImode); }) |