summaryrefslogtreecommitdiff
path: root/gcc/config
diff options
context:
space:
mode:
authorkyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4>2014-10-16 11:46:07 +0000
committerkyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4>2014-10-16 11:46:07 +0000
commit5243af199cc38931293a4c6ec236418ab560b662 (patch)
tree8f40c1030cff1d79f9e63e820aeceece641f1c20 /gcc/config
parent343d6f412f4b1b91cdde5d666bd3c6b82cc72fa6 (diff)
downloadgcc-5243af199cc38931293a4c6ec236418ab560b662.tar.gz
AVX-512. 78/n. Use blend for inserting.
gcc/ * config/i386/i386.c (ix86_expand_vector_set): Handle V8DF, V8DI, V16SF, V16SI, V32HI, V64QI modes. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216310 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/i386.c73
1 files changed, 73 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 64a5c552b4a..073e4ccc0ed 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -40854,6 +40854,79 @@ half:
emit_insn (gen_insert[j][i] (target, target, tmp));
return;
+ case V8DFmode:
+ if (TARGET_AVX512F)
+ {
+ tmp = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode, tmp,
+ gen_rtx_VEC_DUPLICATE (mode, val)));
+ emit_insn (gen_avx512f_blendmv8df (target, tmp, target,
+ force_reg (QImode, GEN_INT (1 << elt))));
+ return;
+ }
+ else
+ break;
+ case V8DImode:
+ if (TARGET_AVX512F)
+ {
+ tmp = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode, tmp,
+ gen_rtx_VEC_DUPLICATE (mode, val)));
+ emit_insn (gen_avx512f_blendmv8di (target, tmp, target,
+ force_reg (QImode, GEN_INT (1 << elt))));
+ return;
+ }
+ else
+ break;
+ case V16SFmode:
+ if (TARGET_AVX512F)
+ {
+ tmp = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode, tmp,
+ gen_rtx_VEC_DUPLICATE (mode, val)));
+ emit_insn (gen_avx512f_blendmv16sf (target, tmp, target,
+ force_reg (HImode, GEN_INT (1 << elt))));
+ return;
+ }
+ else
+ break;
+ case V16SImode:
+ if (TARGET_AVX512F)
+ {
+ tmp = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode, tmp,
+ gen_rtx_VEC_DUPLICATE (mode, val)));
+ emit_insn (gen_avx512f_blendmv16si (target, tmp, target,
+ force_reg (HImode, GEN_INT (1 << elt))));
+ return;
+ }
+ else
+ break;
+ case V32HImode:
+ if (TARGET_AVX512F && TARGET_AVX512BW)
+ {
+ tmp = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode, tmp,
+ gen_rtx_VEC_DUPLICATE (mode, val)));
+ emit_insn (gen_avx512bw_blendmv32hi (target, tmp, target,
+ force_reg (SImode, GEN_INT (1 << elt))));
+ return;
+ }
+ else
+ break;
+ case V64QImode:
+ if (TARGET_AVX512F && TARGET_AVX512BW)
+ {
+ tmp = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode, tmp,
+ gen_rtx_VEC_DUPLICATE (mode, val)));
+ emit_insn (gen_avx512bw_blendmv64qi (target, tmp, target,
+ force_reg (DImode, GEN_INT (1 << elt))));
+ return;
+ }
+ else
+ break;
+
default:
break;
}