diff options
| author | mzakirov <mzakirov@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-07-11 09:02:39 +0000 |
|---|---|---|
| committer | mzakirov <mzakirov@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-07-11 09:02:39 +0000 |
| commit | 5fd254ed5e58a29ddf0705f70b93473219ee5a84 (patch) | |
| tree | c3c7d28f82fab8f86e4821027ad55ae879224f06 /gcc/config | |
| parent | b80c91bc8eab77b0b96208efc38afd6f4f0ca01a (diff) | |
| download | gcc-5fd254ed5e58a29ddf0705f70b93473219ee5a84.tar.gz | |
gcc/
2014-07-11 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
(*movhi_bytes): Likewise.
(*arm_movqi_insn): Likewise.
gcc/testsuite/
2014-07-11 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* gcc.dg/pr61561.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212450 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arm/arm.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index d6ca79a3c2e..dac7a0a6056 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -6286,7 +6286,7 @@ ;; Pattern to recognize insn generated default case above (define_insn "*movhi_insn_arch4" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r") - (match_operand:HI 1 "general_operand" "rI,K,r,mi"))] + (match_operand:HI 1 "general_operand" "rIk,K,r,mi"))] "TARGET_ARM && arm_arch4 && (register_operand (operands[0], HImode) @@ -6310,7 +6310,7 @@ (define_insn "*movhi_bytes" [(set (match_operand:HI 0 "s_register_operand" "=r,r,r") - (match_operand:HI 1 "arm_rhs_operand" "I,r,K"))] + (match_operand:HI 1 "arm_rhs_operand" "I,rk,K"))] "TARGET_ARM" "@ mov%?\\t%0, %1\\t%@ movhi @@ -6425,7 +6425,7 @@ (define_insn "*arm_movqi_insn" [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m") - (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))] + (match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))] "TARGET_32BIT && ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode))" |