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| author | alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-14 16:19:59 +0000 |
|---|---|---|
| committer | alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-14 16:19:59 +0000 |
| commit | 7353a826641610f691031b519b4ecbf25c5a02e1 (patch) | |
| tree | 2b6fa7d7da19b905cca892a607b8a26ccd29462f /gcc/config | |
| parent | f0b916c7ae600c09144059f126f83f3ae9bd770f (diff) | |
| download | gcc-7353a826641610f691031b519b4ecbf25c5a02e1.tar.gz | |
[MIPS] Migrate reduction optabs in mips-ps-3d.md
* config/mips/mips-ps-3d.md (reduc_splus_v2sf): Remove.
(reduc_plus_scal_v2sf): New.
(reduc_smax_v2sf): Rename to...
(reduc_smax_scal_v2sf): ...here, make result SFmode, add vec_extract.
(reduc_smin_v2sf): Rename to...
(reduc_smin_scal_v2sf): ...here, make result SFmode, add vec_extract.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232371 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/mips/mips-ps-3d.md | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md index f6b74f3d257..3da85090da5 100644 --- a/gcc/config/mips/mips-ps-3d.md +++ b/gcc/config/mips/mips-ps-3d.md @@ -371,13 +371,17 @@ [(set_attr "type" "fadd") (set_attr "mode" "SF")]) -(define_insn "reduc_splus_v2sf" - [(set (match_operand:V2SF 0 "register_operand" "=f") - (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f") - (match_dup 1)] - UNSPEC_ADDR_PS))] +(define_expand "reduc_plus_scal_v2sf" + [(match_operand:SF 0 "register_operand" "=f") + (match_operand:V2SF 1 "register_operand" "f")] "TARGET_HARD_FLOAT && TARGET_MIPS3D" - "") + { + rtx temp = gen_reg_rtx (V2SFmode); + emit_insn (gen_mips_addr_ps (temp, operands[1], operands[1])); + rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx; + emit_insn (gen_vec_extractv2sf (operands[0], temp, lane)); + DONE; + }) ; cvt.pw.ps - Floating Point Convert Paired Single to Paired Word (define_insn "mips_cvt_pw_ps" @@ -745,20 +749,26 @@ DONE; }) -(define_expand "reduc_smin_v2sf" - [(match_operand:V2SF 0 "register_operand") +(define_expand "reduc_smin_scal_v2sf" + [(match_operand:SF 0 "register_operand") (match_operand:V2SF 1 "register_operand")] "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT" { - mips_expand_vec_reduc (operands[0], operands[1], gen_sminv2sf3); + rtx temp = gen_reg_rtx (V2SFmode); + mips_expand_vec_reduc (temp, operands[1], gen_sminv2sf3); + rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx; + emit_insn (gen_vec_extractv2sf (operands[0], temp, lane)); DONE; }) -(define_expand "reduc_smax_v2sf" - [(match_operand:V2SF 0 "register_operand") +(define_expand "reduc_smax_scal_v2sf" + [(match_operand:SF 0 "register_operand") (match_operand:V2SF 1 "register_operand")] "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT" { - mips_expand_vec_reduc (operands[0], operands[1], gen_smaxv2sf3); + rtx temp = gen_reg_rtx (V2SFmode); + mips_expand_vec_reduc (temp, operands[1], gen_smaxv2sf3); + rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx; + emit_insn (gen_vec_extractv2sf (operands[0], temp, lane)); DONE; }) |