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authorbstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4>2013-03-09 13:48:05 +0000
committerbstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4>2013-03-09 13:48:05 +0000
commit2838513a2cbe3dabed7f5e5e229099de9618833d (patch)
treec6c4257bc6daf8e297d1d5763c98b90120605f30 /gcc/config
parent39b6232eee3cf86162d5a58982017499e0f815eb (diff)
downloadgcc-2838513a2cbe3dabed7f5e5e229099de9618833d.tar.gz
2013-03-09 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 196572 using svnmerge.py git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@196574 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/aarch64/t-aarch643
-rw-r--r--gcc/config/arm/t-arm3
-rw-r--r--gcc/config/gnu-user.h3
-rw-r--r--gcc/config/microblaze/microblaze-protos.h3
-rw-r--r--gcc/config/microblaze/microblaze.c97
-rw-r--r--gcc/config/microblaze/microblaze.h5
-rw-r--r--gcc/config/microblaze/microblaze.md22
-rw-r--r--gcc/config/microblaze/microblaze.opt4
-rw-r--r--gcc/config/microblaze/predicates.md4
-rw-r--r--gcc/config/s390/s390.h3
-rw-r--r--gcc/config/sh/sh.c4
11 files changed, 124 insertions, 27 deletions
diff --git a/gcc/config/aarch64/t-aarch64 b/gcc/config/aarch64/t-aarch64
index 61adc2916fa..4c265ebba7b 100644
--- a/gcc/config/aarch64/t-aarch64
+++ b/gcc/config/aarch64/t-aarch64
@@ -18,6 +18,9 @@
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
+TM_H += $(srcdir)/config/aarch64/aarch64-cores.def
+OPTIONS_H_EXTRA += $(srcdir)/config/aarch64/aarch64-cores.def
+
$(srcdir)/config/aarch64/aarch64-tune.md: $(srcdir)/config/aarch64/gentune.sh \
$(srcdir)/config/aarch64/aarch64-cores.def
$(SHELL) $(srcdir)/config/aarch64/gentune.sh \
diff --git a/gcc/config/arm/t-arm b/gcc/config/arm/t-arm
index 40b3cd77609..96b88de0f7c 100644
--- a/gcc/config/arm/t-arm
+++ b/gcc/config/arm/t-arm
@@ -18,6 +18,9 @@
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
+TM_H += $(srcdir)/config/arm/arm-cores.def
+OPTIONS_H_EXTRA += $(srcdir)/config/arm/arm-cores.def
+
# All md files - except for arm.md.
# This list should be kept in alphabetical order and updated whenever an md
# file is added or removed.
diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
index 6c26163b223..bcdf0e6cc5a 100644
--- a/gcc/config/gnu-user.h
+++ b/gcc/config/gnu-user.h
@@ -109,8 +109,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
LD_STATIC_OPTION " --whole-archive -lasan --no-whole-archive " \
LD_DYNAMIC_OPTION "}}%{!static-libasan:-lasan}"
#undef LIBTSAN_EARLY_SPEC
-#define LIBTSAN_EARLY_SPEC "%{!shared:libasan_preinit%O%s} " \
- "%{static-libtsan:%{!shared:" \
+#define LIBTSAN_EARLY_SPEC "%{static-libtsan:%{!shared:" \
LD_STATIC_OPTION " --whole-archive -ltsan --no-whole-archive " \
LD_DYNAMIC_OPTION "}}%{!static-libtsan:-ltsan}"
#endif
diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
index 44740f3dbc3..e19939f0930 100644
--- a/gcc/config/microblaze/microblaze-protos.h
+++ b/gcc/config/microblaze/microblaze-protos.h
@@ -39,7 +39,7 @@ extern void print_operand (FILE *, rtx, int);
extern void print_operand_address (FILE *, rtx);
extern void init_cumulative_args (CUMULATIVE_ARGS *,tree, rtx);
extern bool microblaze_legitimate_address_p (enum machine_mode, rtx, bool);
-extern int microblaze_is_interrupt_handler (void);
+extern int microblaze_is_interrupt_variant (void);
extern rtx microblaze_return_addr (int, rtx);
extern int simple_memory_operand (rtx, enum machine_mode);
extern int double_memory_operand (rtx, enum machine_mode);
@@ -49,6 +49,7 @@ extern HOST_WIDE_INT microblaze_initial_elimination_offset (int, int);
extern void microblaze_declare_object (FILE *, const char *, const char *,
const char *, int);
extern void microblaze_asm_output_ident (const char *);
+extern int microblaze_legitimate_pic_operand (rtx);
#endif /* RTX_CODE */
/* Declare functions in microblaze-c.c. */
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index f45d30cf450..3a5299410b9 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -195,6 +195,7 @@ enum reg_class microblaze_regno_to_class[] =
and epilogue and use appropriate interrupt return.
save_volatiles - Similar to interrupt handler, but use normal return. */
int interrupt_handler;
+int fast_interrupt;
int save_volatiles;
const struct attribute_spec microblaze_attribute_table[] = {
@@ -202,6 +203,8 @@ const struct attribute_spec microblaze_attribute_table[] = {
affects_type_identity */
{"interrupt_handler", 0, 0, true, false, false, NULL,
false },
+ {"fast_interrupt", 0, 0, true, false, false, NULL,
+ false },
{"save_volatiles" , 0, 0, true, false, false, NULL,
false },
{ NULL, 0, 0, false, false, false, NULL,
@@ -596,6 +599,32 @@ microblaze_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
return microblaze_classify_address (&addr, x, mode, strict);
}
+int
+microblaze_valid_pic_const (rtx x)
+{
+ switch (GET_CODE (x))
+ {
+ case CONST:
+ case CONST_INT:
+ case CONST_DOUBLE:
+ return true;
+ default:
+ return false;
+ }
+}
+
+int
+microblaze_legitimate_pic_operand (rtx x)
+{
+ struct microblaze_address_info addr;
+
+ if (pic_address_needs_scratch (x))
+ return 0;
+ if (!microblaze_valid_pic_const(x))
+ return 0;
+
+ return 1;
+}
/* Try machine-dependent ways of modifying an illegitimate address
to be legitimate. If we find one, return the new, valid address.
@@ -1380,6 +1409,21 @@ microblaze_option_override (void)
microblaze_has_clz = 0;
}
+ /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */
+ ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.30.a");
+ if (ver < 0)
+ {
+ if (TARGET_REORDER == 1)
+ warning (0, "-mxl-reorder can be used only with -mcpu=v8.30.a or greater");
+ TARGET_REORDER = 0;
+ }
+ else if ((ver == 0) && !TARGET_PATTERN_COMPARE)
+ {
+ if (TARGET_REORDER == 1)
+ warning (0, "-mxl-reorder requires -mxl-pattern-compare for -mcpu=v8.30.a");
+ TARGET_REORDER = 0;
+ }
+
if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL)
error ("-mxl-multiply-high requires -mno-xl-soft-mul");
@@ -1465,6 +1509,18 @@ microblaze_interrupt_function_p (tree func)
return a != NULL_TREE;
}
+static int
+microblaze_fast_interrupt_function_p (tree func)
+{
+ tree a;
+
+ if (TREE_CODE (func) != FUNCTION_DECL)
+ return 0;
+
+ a = lookup_attribute ("fast_interrupt", DECL_ATTRIBUTES (func));
+ return a != NULL_TREE;
+}
+
/* Return true if FUNC is an interrupt function which uses
normal return, indicated by the "save_volatiles" attribute. */
@@ -1481,12 +1537,13 @@ microblaze_save_volatiles (tree func)
}
/* Return whether function is tagged with 'interrupt_handler'
- attribute. Return true if function should use return from
- interrupt rather than normal function return. */
+ or 'fast_interrupt' attribute. Return true if function
+ should use return from interrupt rather than normal
+ function return. */
int
-microblaze_is_interrupt_handler (void)
+microblaze_is_interrupt_variant (void)
{
- return interrupt_handler;
+ return (interrupt_handler || fast_interrupt);
}
/* Determine of register must be saved/restored in call. */
@@ -1507,17 +1564,18 @@ microblaze_must_save_register (int regno)
{
if (regno == MB_ABI_SUB_RETURN_ADDR_REGNUM)
return 1;
- if ((interrupt_handler || save_volatiles) &&
+ if ((microblaze_is_interrupt_variant () || save_volatiles) &&
(regno >= 3 && regno <= 12))
return 1;
}
- if (interrupt_handler)
+ if (microblaze_is_interrupt_variant ())
{
if (df_regs_ever_live_p (regno)
|| regno == MB_ABI_MSR_SAVE_REG
- || regno == MB_ABI_ASM_TEMP_REGNUM
- || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM)
+ || (interrupt_handler
+ && (regno == MB_ABI_ASM_TEMP_REGNUM
+ || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM)))
return 1;
}
@@ -1590,6 +1648,8 @@ compute_frame_size (HOST_WIDE_INT size)
interrupt_handler =
microblaze_interrupt_function_p (current_function_decl);
+ fast_interrupt =
+ microblaze_fast_interrupt_function_p (current_function_decl);
save_volatiles = microblaze_save_volatiles (current_function_decl);
gp_reg_size = 0;
@@ -1623,7 +1683,7 @@ compute_frame_size (HOST_WIDE_INT size)
total_size += gp_reg_size;
/* Add 4 bytes for MSR. */
- if (interrupt_handler)
+ if (microblaze_is_interrupt_variant ())
total_size += 4;
/* No space to be allocated for link register in leaf functions with no other
@@ -2115,7 +2175,7 @@ save_restore_insns (int prologue)
base_reg_rtx = stack_pointer_rtx;
/* For interrupt_handlers, need to save/restore the MSR. */
- if (interrupt_handler)
+ if (microblaze_is_interrupt_variant ())
{
isr_mem_rtx = gen_rtx_MEM (SImode,
gen_rtx_PLUS (Pmode, base_reg_rtx,
@@ -2129,7 +2189,7 @@ save_restore_insns (int prologue)
isr_msr_rtx = gen_rtx_REG (SImode, ST_REG);
}
- if (interrupt_handler && !prologue)
+ if (microblaze_is_interrupt_variant () && !prologue)
{
emit_move_insn (isr_reg_rtx, isr_mem_rtx);
emit_move_insn (isr_msr_rtx, isr_reg_rtx);
@@ -2149,7 +2209,7 @@ save_restore_insns (int prologue)
reg_rtx = gen_rtx_REG (SImode, regno);
insn = gen_rtx_PLUS (Pmode, base_reg_rtx, GEN_INT (gp_offset));
mem_rtx = gen_rtx_MEM (SImode, insn);
- if (interrupt_handler || save_volatiles)
+ if (microblaze_is_interrupt_variant () || save_volatiles)
/* Do not optimize in flow analysis. */
MEM_VOLATILE_P (mem_rtx) = 1;
@@ -2167,7 +2227,7 @@ save_restore_insns (int prologue)
}
}
- if (interrupt_handler && prologue)
+ if (microblaze_is_interrupt_variant () && prologue)
{
emit_move_insn (isr_reg_rtx, isr_msr_rtx);
emit_move_insn (isr_mem_rtx, isr_reg_rtx);
@@ -2197,10 +2257,12 @@ microblaze_function_prologue (FILE * file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
fputs ("\t.ent\t", file);
if (interrupt_handler && strcmp (INTERRUPT_HANDLER_NAME, fnname))
fputs ("_interrupt_handler", file);
+ else if (fast_interrupt && strcmp (FAST_INTERRUPT_NAME, fnname))
+ fputs ("_fast_interrupt", file);
else
assemble_name (file, fnname);
fputs ("\n", file);
- if (!interrupt_handler)
+ if (!microblaze_is_interrupt_variant ())
ASM_OUTPUT_TYPE_DIRECTIVE (file, fnname, "function");
}
@@ -2552,9 +2614,12 @@ static void
microblaze_globalize_label (FILE * stream, const char *name)
{
fputs ("\t.globl\t", stream);
- if (interrupt_handler && strcmp (name, INTERRUPT_HANDLER_NAME))
+ if (microblaze_is_interrupt_variant ())
{
- fputs (INTERRUPT_HANDLER_NAME, stream);
+ if (interrupt_handler && strcmp (name, INTERRUPT_HANDLER_NAME))
+ fputs (INTERRUPT_HANDLER_NAME, stream);
+ else if (fast_interrupt && strcmp (name, FAST_INTERRUPT_NAME))
+ fputs (FAST_INTERRUPT_NAME, stream);
fputs ("\n\t.globl\t", stream);
}
assemble_name (stream, name);
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
index a188a2eb113..8fbe5bf8085 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -78,6 +78,7 @@ extern enum pipeline_type microblaze_pipe;
"%{mno-xl-barrel-shift:%<mxl-barrel-shift}", \
"%{mno-xl-pattern-compare:%<mxl-pattern-compare}", \
"%{mxl-soft-div:%<mno-xl-soft-div}", \
+ "%{mxl-reorder:%<mno-xl-reorder}", \
"%{msoft-float:%<mhard-float}"
/* Tell collect what flags to pass to nm. */
@@ -540,7 +541,7 @@ typedef struct microblaze_args
/* Define this, so that when PIC, reload won't try to reload invalid
addresses which require two reload registers. */
-#define LEGITIMATE_PIC_OPERAND_P(X) (!pic_address_needs_scratch (X))
+#define LEGITIMATE_PIC_OPERAND_P(X) microblaze_legitimate_pic_operand (X)
#define CASE_VECTOR_MODE (SImode)
@@ -755,9 +756,11 @@ do { \
/* Handle interrupt attribute. */
extern int interrupt_handler;
+extern int fast_interrupt;
extern int save_volatiles;
#define INTERRUPT_HANDLER_NAME "_interrupt_handler"
+#define FAST_INTERRUPT_NAME "_fast_interrupt"
/* The following #defines are used in the headers files. Always retain these. */
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
index 339186455ba..02857875022 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -353,6 +353,20 @@
(automata_option "time")
(automata_option "progress")
+(define_insn "bswapsi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (bswap:SI (match_operand:SI 1 "register_operand" "r")))]
+ "TARGET_REORDER"
+ "swapb %0, %1"
+)
+
+(define_insn "bswaphi2"
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (bswap:HI (match_operand:HI 1 "register_operand" "r")))]
+ "TARGET_REORDER"
+ "swaph %0, %1"
+)
+
;;----------------------------------------------------------------
;; Microblaze delay slot description
;;----------------------------------------------------------------
@@ -947,7 +961,7 @@
(define_insn "movsi_status"
[(set (match_operand:SI 0 "register_operand" "=d,d,z")
(match_operand:SI 1 "register_operand" "z,d,d"))]
- "interrupt_handler"
+ "microblaze_is_interrupt_variant ()"
"@
mfs\t%0,%1 #mfs
addk\t%0,%1,r0 #add movsi
@@ -1904,7 +1918,7 @@
[(any_return)]
""
{
- if (microblaze_is_interrupt_handler ())
+ if (microblaze_is_interrupt_variant ())
return "rtid\tr14, 0\;%#";
else
return "rtsd\tr15, 8\;%#";
@@ -1921,7 +1935,7 @@
(use (match_operand:SI 0 "register_operand" ""))]
""
{
- if (microblaze_is_interrupt_handler ())
+ if (microblaze_is_interrupt_variant ())
return "rtid\tr14,0 \;%#";
else
return "rtsd\tr15,8 \;%#";
@@ -2017,7 +2031,7 @@
(set_attr "length" "4")])
(define_insn "call_internal1"
- [(call (mem (match_operand:SI 0 "call_insn_operand" "ri"))
+ [(call (mem (match_operand:SI 0 "call_insn_simple_operand" "ri"))
(match_operand:SI 1 "" "i"))
(clobber (reg:SI R_SR))]
""
diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt
index fc7d0cdd1d0..a659166372a 100644
--- a/gcc/config/microblaze/microblaze.opt
+++ b/gcc/config/microblaze/microblaze.opt
@@ -67,6 +67,10 @@ mxl-soft-mul
Target Mask(SOFT_MUL)
Use the soft multiply emulation (default)
+mxl-reorder
+Target Var(TARGET_REORDER) Init(2)
+Use reorder instructions (swap and byte reversed load/store) (default)
+
mxl-soft-div
Target Mask(SOFT_DIV)
Use the software emulation for divides (default)
diff --git a/gcc/config/microblaze/predicates.md b/gcc/config/microblaze/predicates.md
index 9bf98101d9b..e6e99836024 100644
--- a/gcc/config/microblaze/predicates.md
+++ b/gcc/config/microblaze/predicates.md
@@ -49,6 +49,10 @@
(define_predicate "call_insn_operand"
(match_test "CALL_INSN_OP (op)"))
+(define_predicate "call_insn_simple_operand"
+ (and (match_test "CALL_INSN_OP (op)")
+ (match_test "GET_CODE (op) == REG || GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST_INT")))
+
;; Return if OPERAND is valid as a source operand for a move instruction.
(define_predicate "move_operand"
(and (
diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index a9b7f5c2f6e..bd0bc232a5d 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -591,6 +591,9 @@ extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
/* Register save slot alignment. */
#define DWARF_CIE_DATA_ALIGNMENT (-UNITS_PER_LONG)
+/* Let the assembler generate debug line info. */
+#define DWARF2_ASM_LINE_DEBUG_INFO 1
+
/* Frame registers. */
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index be49e46bc4d..dcbd93286ed 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -820,7 +820,7 @@ sh_option_override (void)
|| (TARGET_HARD_SH4 && TARGET_SH2E)
|| (TARGET_SHCOMPACT && TARGET_FPU_ANY)))
sh_div_strategy = SH_DIV_CALL_FP;
- else if (! strcmp (sh_div_str, "call-table") && TARGET_SH2)
+ else if (! strcmp (sh_div_str, "call-table") && TARGET_DYNSHIFT)
sh_div_strategy = SH_DIV_CALL_TABLE;
else
/* Pick one that makes most sense for the target in general.
@@ -840,8 +840,6 @@ sh_option_override (void)
sh_div_strategy = SH_DIV_CALL_FP;
/* SH1 .. SH3 cores often go into small-footprint systems, so
default to the smallest implementation available. */
- else if (TARGET_SH2) /* ??? EXPERIMENTAL */
- sh_div_strategy = SH_DIV_CALL_TABLE;
else
sh_div_strategy = SH_DIV_CALL_DIV1;
}