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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2016-06-24 21:55:40 +0000 |
|---|---|---|
| committer | William Schmidt <wschmidt@gcc.gnu.org> | 2016-06-24 21:55:40 +0000 |
| commit | 53605f35cddd3c353ae9f7db1aaf9565a08826ea (patch) | |
| tree | 3e89260f0904d7fe783bd918b831130450b1f0d9 /gcc/doc/extend.texi | |
| parent | 6e085858a266dfeb0b335e8cd876872c633c2634 (diff) | |
| download | gcc-53605f35cddd3c353ae9f7db1aaf9565a08826ea.tar.gz | |
rs6000-builtin.def (BU_FLOAT128_2): New #define.
[gcc]
2016-06-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): New #define.
(BU_FLOAT128_1): Likewise.
(FABSQ): Likewise.
(COPYSIGNQ): Likewise.
(RS6000_BUILTIN_NANQ): Likewise.
(RS6000_BUILTIN_NANSQ): Likewise.
(RS6000_BUILTIN_INFQ): Likewise.
(RS6000_BUILTIN_HUGE_VALQ): Likewise.
* config/rs6000/rs6000.c (rs6000_fold_builtin): New prototype.
(TARGET_FOLD_BUILTIN): New #define.
(rs6000_builtin_mask_calculate): Add TARGET_FLOAT128 entry.
(rs6000_invalid_builtin): Add handling for RS6000_BTM_FLOAT128.
(rs6000_fold_builtin): New target hook implementation, handling
folding of 128-bit NaNs and infinities.
(rs6000_init_builtins): Initialize const_str_type_node; ensure all
entries are filled in to avoid problems during bootstrap
self-test; define builtins for 128-bit NaNs and infinities.
(rs6000_opt_mask): Add entry for float128.
* config/rs6000/rs6000.h (RS6000_BTM_FLOAT128): New #define.
(RS6000_BTM_COMMON): Include RS6000_BTM_FLOAT128.
(rs6000_builtin_type_index): Add RS6000_BTI_const_str.
(const_str_type_node): New #define.
* config/rs6000/rs6000.md (copysign<mode>3 for IEEE128): Convert
to a define_expand that dispatches to either copysign<mode>3_soft
or copysign<mode>3_hard.
(copysign<mode>3_hard): Rename from copysign<mode>3.
(copysign<mode>3_soft): New define_insn.
* doc/extend.texi: Document new builtins.
[gcc/testsuite]
2016-06-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/abs128-1.c: New.
* gcc.target/powerpc/copysign128-1.c: New.
* gcc.target/powerpc/inf128-1.c: New.
* gcc.target/powerpc/nan128-1.c: New.
From-SVN: r237774
Diffstat (limited to 'gcc/doc/extend.texi')
| -rw-r--r-- | gcc/doc/extend.texi | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 604b441d184..9c8ea837456 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -14782,6 +14782,40 @@ The @code{__builtin_ppc_mftb} function always generates one instruction and returns the Time Base Register value as an unsigned long, throwing away the most significant word on 32-bit environments. +Additional built-in functions are available for the 64-bit PowerPC +family of processors, for efficient use of 128-bit floating point +(@code{__float128}) values. + +The following floating-point built-in functions are available with +@code{-mfloat128} and Altivec support. All of them implement the +function that is part of the name. + +@smallexample +__float128 __builtin_fabsq (__float128) +__float128 __builtin_copysignq (__float128, __float128) +@end smallexample + +The following built-in functions are available with @code{-mfloat128} +and Altivec support. + +@table @code +@item __float128 __builtin_infq (void) +Similar to @code{__builtin_inf}, except the return type is @code{__float128}. +@findex __builtin_infq + +@item __float128 __builtin_huge_valq (void) +Similar to @code{__builtin_huge_val}, except the return type is @code{__float128}. +@findex __builtin_huge_valq + +@item __float128 __builtin_nanq (void) +Similar to @code{__builtin_nan}, except the return type is @code{__float128}. +@findex __builtin_nanq + +@item __float128 __builtin_nansq (void) +Similar to @code{__builtin_nans}, except the return type is @code{__float128}. +@findex __builtin_nansq +@end table + The following built-in functions are available for the PowerPC family of processors, starting with ISA 2.06 or later (@option{-mcpu=power7} or @option{-mpopcntd}): |