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author | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-05-31 07:53:13 +0000 |
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committer | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-05-31 07:53:13 +0000 |
commit | ad0df2d64b28f10e4990a21a35b69540911df9d0 (patch) | |
tree | bf34282f98f8bf14d3c74c82baa0ef43ba84fe9d /gcc/doc/md.texi | |
parent | 0803532c52733b8a02c0b57fb87e3c6313076ce6 (diff) | |
download | gcc-ad0df2d64b28f10e4990a21a35b69540911df9d0.tar.gz |
* doc/md.texi (Machine Constraints): Document
missing SPARC constraints.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@67263 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc/md.texi')
-rw-r--r-- | gcc/doc/md.texi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 0ef948ad171..665e34940ee 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -2020,6 +2020,22 @@ Floating-point register that can hold 32- or 64-bit values. @item e Floating-point register that can hold 64- or 128-bit values. +@item c +Floating-point condition code register. + +@item d +Floating-point register that can hold 32- or 64-bit values. +It is only valid on the SPARC-V9 architecture when the Visual +Instructions Set is available. + +@item b +Floating-point register that can hold 64- or 128-bit values. +It is only valid on the SPARC-V9 architecture when the Visual +Instructions Set is available. + +@item h +64-bit global or out register for the SPARC-V8+ architecture. + @item I Signed 13-bit constant |