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author | echristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-07-06 07:32:43 +0000 |
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committer | echristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-07-06 07:32:43 +0000 |
commit | 08aec1b675182acd0c89995fd7a366ba053b6b57 (patch) | |
tree | 61140b6c79b7765bdda176c54f728935cf108b3b /gcc/doc | |
parent | b0c8278d88629d77418a993577a698d000b1fea8 (diff) | |
download | gcc-08aec1b675182acd0c89995fd7a366ba053b6b57.tar.gz |
2001-07-05 Eric Christopher <echristo@redhat.com>
* config/mips/mips.h (MASK_MIPS3900): Remove.
(MASK_MIPS16,MASK_NO_CHECK_ZERO_DIV,MASK_CHECK_RANGE_DIV,
MASK_UNINIT_CONST_IN_RODATA): Change for 3900 mask removal.
(TARGET_MIPS3900): Change to use mips_arch.
(TARGET_MIPS4000): New.
(TARGET_MIPS4100): New.
(TARGET_MIPS4300): New.
(TARGET_SWITCHES): Change 3900 and 4650 options to NULL.
(SUBTARGET_TARGET_OPTIONS): Add -march. Change help text
for -mipsX.
(GENERATE_BRANCHLIKELY): Move TARGET_MIPS3900.
(ISA_HAS_BRANCHLIKELY): To here.
(CC1_CPU_SPEC): New.
(CC1_SPEC): Use here. Remove 4650 and 3900 options.
(mips_arch_string): Declare.
(mips_arch): Declare.
(TARGET_OPTIONS): Add -march and -mtune.
* config/mips/mips.c (mips_arch_string): New.
(mips_arch): New.
(override_options): Handle -march for codegen and -mtune
for scheduling. Use mips_arch. Move tx39 target default here.
(mips_parse_cpu): Move error message to override_options.
* config/mips/r3900.h (TARGET_DEFAULT): Remove.
* config/mips/mips.md: Use TARGET_MIPS4000 and TARGET_MIPS4300.
* doc/invoke.texi (Option Summary): Add -march and -mtune entries.
(MIPS Options): Ditto. Change mcpu entry to historical text.
2001-07-05 H.J. Lu (hjl@gnu.org)
* config/mips/mips.c (mips_parse_cpu): New function to parse
-march=*/-mcpu=*.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@43803 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 40 |
1 files changed, 31 insertions, 9 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 18c054f4963..6915e62b08b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -447,8 +447,8 @@ in the following sections. @emph{MIPS Options} @gccoptlist{ --mabicalls -mcpu=@var{cpu-type} @gol --membedded-data -muninit-const-in-rodata @gol +-mabicalls -march=@var{cpu-type} -mtune=@var{cpu=type} @gol +-mcpu=@var{cpu-type} -membedded-data -muninit-const-in-rodata @gol -membedded-pic -mfp32 -mfp64 -mgas -mgp32 -mgp64 @gol -mgpopt -mhalf-pic -mhard-float -mint64 -mips1 @gol -mips2 -mips3 -mips4 -mlong64 -mlong32 -mlong-calls -mmemcpy @gol @@ -935,9 +935,16 @@ names @samp{c9x} and @samp{iso9899:199x} are deprecated. Default, ISO C89 plus GNU extensions (including some C99 features). @item gnu99 -@itemx gnu9x -ISO C99 plus GNU extensions. When ISO C99 is fully implemented in GCC, -this will become the default. The name @samp{gnu9x} is deprecated. +iso9899:1999 + gnu extensions + +@item iso9899:199x +same as @option{-std=iso9899:1999}, deprecated + +@item c9x +same as @option{-std=iso9899:1999}, deprecated + +@item gnu9x +same as @option{-std=gnu99}, deprecated @end table @@ -3804,7 +3811,7 @@ optimization. If more memory than specified is required, the optimization will not be done. @item max-gcse-passes -The maximum number of passes of GCSE to run. +The maximum number of passes of GCSE to run. @item max-inline-insns If an function contains more than this many instructions, it @@ -4451,7 +4458,7 @@ Variables}. As a special kludge, if the path provided by @option{-B} is @file{[dir/]stage@var{N}/}, where @var{N} is a number in the range 0 to 9, then it will be replaced by @file{[dir/]include}. This is to help -with boot-strapping the compiler. +with boot-strapping the compiler. @item -specs=@var{file} @opindex specs @@ -7031,8 +7038,19 @@ option @option{-mhc-struct-return}. These @samp{-m} options are defined for the MIPS family of computers: @table @gcctabopt -@item -mcpu=@var{cpu-type} -@opindex mcpu + +@item -march=@var{cpu-type} +@opindex march +Assume the defaults for the machine type @var{cpu-type} when generating +instructions. The choices for @var{cpu-type} are @samp{r2000}, @samp{r3000}, +@samp{r3900}, @samp{r4000}, @samp{r4100}, @samp{r4300}, @samp{r4400}, +@samp{r4600}, @samp{r4650}, @samp{r5000}, @samp{r6000}, @samp{r8000}, +and @samp{orion}. Additionally, the @samp{r2000}, @samp{r3000}, +@samp{r4000}, @samp{r5000}, and @samp{r6000} can be abbreviated as +@samp{r2k} (or @samp{r2K}), @samp{r3k}, etc. + +@item -mtune=@var{cpu-type} +@opindex mtune Assume the defaults for the machine type @var{cpu-type} when scheduling instructions. The choices for @var{cpu-type} are @samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4100}, @samp{r4300}, @samp{r4400}, @@ -7045,6 +7063,10 @@ chip, the compiler will not generate any code that does not meet level 1 of the MIPS ISA (instruction set architecture) without a @option{-mipsX} or @option{-mabi} switch being used. +@item -mcpu=@var{cpu-type} +@opindex mcpu +This is identical to specifying both @option{-march} and @option{-mtune}. + @item -mips1 @opindex mips1 Issue instructions from level 1 of the MIPS ISA@. This is the default. |