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author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-12 16:22:15 +0000 |
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committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-12 16:22:15 +0000 |
commit | ccc462132e947eca4a9c2093f3eea6c3262f9a86 (patch) | |
tree | 632b3f747cba3eaeaf9d0c7f7cc1a5a45920cc24 /gcc/doc | |
parent | f17aef516df62ff37b49117f6bc4013fd9c8af83 (diff) | |
download | gcc-ccc462132e947eca4a9c2093f3eea6c3262f9a86.tar.gz |
2014-05-12 David Wohlferd <dw@LimeGreenSocks.com>
* doc/tm.texi: Remove reference to deleted macro.
* doc/tm.texi.in: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210330 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/tm.texi | 3 | ||||
-rw-r--r-- | gcc/doc/tm.texi.in | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index fd4e4fd6628..92312f519f1 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -10067,9 +10067,6 @@ Another note: according to the MIPS spec, coprocessor 1 (if present) is the FPU@. One accesses COP1 registers through standard mips floating-point support; they are not included in this mechanism. -There is one macro used in defining the MIPS coprocessor interface which -you may want to override in subtargets; it is described below. - @node PCH Target @section Parameters for Precompiled Header Validity Checking @cindex parameters, precompiled headers diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 9c030df6990..7a91da04956 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -7565,9 +7565,6 @@ Another note: according to the MIPS spec, coprocessor 1 (if present) is the FPU@. One accesses COP1 registers through standard mips floating-point support; they are not included in this mechanism. -There is one macro used in defining the MIPS coprocessor interface which -you may want to override in subtargets; it is described below. - @node PCH Target @section Parameters for Precompiled Header Validity Checking @cindex parameters, precompiled headers |