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authorbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>2014-05-13 23:44:42 +0000
committerbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>2014-05-13 23:44:42 +0000
commite11792763eb9ca3fb10a72a9bdcb93950a3fb5b0 (patch)
tree7608739ea7cae99622996508bce6adf83bf96c50 /gcc/doc
parentb592332a156a6edcd40c413dcf91251ded29a2b2 (diff)
downloadgcc-e11792763eb9ca3fb10a72a9bdcb93950a3fb5b0.tar.gz
gcc/
* doc/sourcebuild.texi: (dfp_hw): Document. (p8vector_hw): Likewise. (powerpc_eabi_ok): Likewise. (powerpc_elfv2): Likewise. (powerpc_htm_ok): Likewise. (ppc_recip_hw): Likewise. (vsx_hw): Likewise. gcc/testsuite/ * lib/target-support.exp (check_dfp_hw_available): New function. (is-effective-target): Check $arg for dfp_hw. (is-effective-target-keyword): Likewise. * gcc.target/powerpc/pack03.c: (dg-require-effective-target): Change target to dfp_hw. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210404 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/sourcebuild.texi31
1 files changed, 28 insertions, 3 deletions
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 914860813ca..7438980f08e 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1601,6 +1601,13 @@ MIPS target supports @code{-mpaired-single}.
@subsubsection PowerPC-specific attributes
@table @code
+
+@item dfp_hw
+PowerPC target supports executing hardware DFP instructions.
+
+@item p8vector_hw
+PowerPC target supports executing VSX instructions (ISA 2.07).
+
@item powerpc64
Test system supports executing 64-bit instructions.
@@ -1610,12 +1617,24 @@ PowerPC target supports AltiVec.
@item powerpc_altivec_ok
PowerPC target supports @code{-maltivec}.
+@item powerpc_eabi_ok
+PowerPC target supports @code{-meabi}.
+
+@item powerpc_elfv2
+PowerPC target supports @code{-mabi=elfv2}.
+
@item powerpc_fprs
PowerPC target supports floating-point registers.
@item powerpc_hard_double
PowerPC target supports hardware double-precision floating-point.
+@item powerpc_htm_ok
+PowerPC target supports @code{-mhtm}
+
+@item powerpc_p8vector_ok
+PowerPC target supports @code{-mpower8-vector}
+
@item powerpc_ppu_ok
PowerPC target supports @code{-mcpu=cell}.
@@ -1629,9 +1648,6 @@ PowerPC target supports PowerPC SPE.
@item powerpc_spu
PowerPC target supports PowerPC SPU.
-@item spu_auto_overlay
-SPU target has toolchain that supports automatic overlay generation.
-
@item powerpc_vsx_ok
PowerPC target supports @code{-mvsx}.
@@ -1639,8 +1655,17 @@ PowerPC target supports @code{-mvsx}.
Including the options used to compile this particular test, the
PowerPC target supports PowerPC 405.
+@item ppc_recip_hw
+PowerPC target supports executing reciprocal estimate instructions.
+
+@item spu_auto_overlay
+SPU target has toolchain that supports automatic overlay generation.
+
@item vmx_hw
PowerPC target supports executing AltiVec instructions.
+
+@item vsx_hw
+PowerPC target supports executing VSX instructions (ISA 2.06).
@end table
@subsubsection Other hardware attributes