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authorjiwang <jiwang@138bc75d-0d04-0410-961f-82ee72b054a4>2015-01-16 10:14:51 +0000
committerjiwang <jiwang@138bc75d-0d04-0410-961f-82ee72b054a4>2015-01-16 10:14:51 +0000
commitd2d1816332239175f64932665d42f0fb8f00a9e0 (patch)
tree7f4d05384f9791b939aff37fa125d72e83cb9294 /gcc/expmed.c
parenta06fe1eef3e0da8f6b5dbfcf2736ae7c2391ceab (diff)
downloadgcc-d2d1816332239175f64932665d42f0fb8f00a9e0.tar.gz
[Patch] Warn and truncate bitsize when partial overflow happen
PR rtl-optimization/64011 gcc/ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when there is partial overflow. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219717 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/expmed.c')
-rw-r--r--gcc/expmed.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/expmed.c b/gcc/expmed.c
index 480601cf482..beedfc052b6 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -557,6 +557,21 @@ store_bit_field_using_insv (const extraction_insn *insv, rtx op0,
copy_back = true;
}
+ /* There are similar overflow check at the start of store_bit_field_1,
+ but that only check the situation where the field lies completely
+ outside the register, while there do have situation where the field
+ lies partialy in the register, we need to adjust bitsize for this
+ partial overflow situation. Without this fix, pr48335-2.c on big-endian
+ will broken on those arch support bit insert instruction, like arm, aarch64
+ etc. */
+ if (bitsize + bitnum > unit && bitnum < unit)
+ {
+ warning (OPT_Wextra, "write of "HOST_WIDE_INT_PRINT_UNSIGNED"bit data "
+ "outside the bound of destination object, data truncated into "
+ HOST_WIDE_INT_PRINT_UNSIGNED"bit", bitsize, unit - bitnum);
+ bitsize = unit - bitnum;
+ }
+
/* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count
"backwards" from the size of the unit we are inserting into.
Otherwise, we count bits from the most significant on a