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author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-07-12 19:03:06 +0000 |
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committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-07-12 19:03:06 +0000 |
commit | a1e0509e3bdbe5c25ecec70eb0be6e3d78068cf3 (patch) | |
tree | 9434cb86560bce7c7cc8fe82277a1394b43bf551 /gcc/ira-int.h | |
parent | e8aa5a28f2e202814c2daadc7fe98ec6ffea6aa7 (diff) | |
download | gcc-a1e0509e3bdbe5c25ecec70eb0be6e3d78068cf3.tar.gz |
gcc/
* Makefile.in (target-globals.o): Depend on $(IRA_INT_H).
* ira-int.h (ira_max_nregs, ira_important_class_nums): Delete.
(target_ira_int): New structure.
(default_target_ira_int): Declare.
(this_target_ira_int): Declare as a variable or define as a macro.
(ira_reg_mode_hard_regset, ira_register_move_cost)
(ira_may_move_in_cost, ira_may_move_out_cost, ira_class_subset_p)
(ira_non_ordered_class_hard_regs, ira_class_hard_reg_index)
(prohibited_class_mode_regs, ira_important_classes_num)
(ira_important_classes, ira_reg_class_intersect)
(ira_reg_classes_intersect_p, ira_reg_class_super_classes)
(ira_reg_class_union): Redefine as macros.
* ira.h (target_ira): New structure.
(default_target_ira): Declare.
(this_target_ira): Declare as a variable or define as a macro.
(ira_available_class_regs, ira_hard_regno_cover_class)
(ira_reg_class_cover_size, ira_reg_class_cover, ira_class_translate)
(ira_reg_class_nregs, ira_memory_move_cost, ira_class_hard_regs)
(ira_class_hard_regs_num): Redefine as macros.
* ira.c (default_target_ira, default_target_ira_int): New variables.
(this_target_ira, this_target_ira_int): New conditional variables.
(ira_reg_mode_hard_regset, ira_memory_move_cost)
(ira_register_move_cost, ira_may_move_in_cost, ira_may_move_out_cost)
(ira_class_subset_p): Delete.
(no_unit_alloc_regs): Redefine as a macro.
(ira_class_hard_regs, ira_non_ordered_class_hard_regs)
(ira_class_hard_regs_num, ira_class_hard_reg_index)
(ira_available_class_regs): Delete.
(alloc_reg_class_subclasses): Redefine as a macro.
(ira_reg_class_cover_size, ira_reg_class_cover)
(ira_important_classes_num, ira_important_classes)
(ira_important_class_nums, ira_class_translate): Delete.
(cover_class_order): Document the variable's lifetime.
(reorder_important_classes): Don't set ira_important_class_nums.
(ira_reg_class_intersect, ira_reg_classes_intersect_p)
(ira_reg_class_super_classes, ira_reg_class_union)
(ira_hard_regno_cover_class, ira_reg_class_nregs, ira_max_nregs):
Delete.
(setup_reg_class_nregs): Don't set ira_max_regs.
(prohibited_class_mode_regs): Delete.
* target-globals.h (this_target_ira, this_target_ira_int): Declare.
(target_globals): Add ira and ira_int fields.
(restore_target_globals): Copy the ira field to this_target_ira
and the ira_int field to this_target_ira_int.
* target-globals.c: Include ira-int.h.
(default_target_globals): Initialize the ira and ira_int fields.
(save_target_globals): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@162102 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/ira-int.h')
-rw-r--r-- | gcc/ira-int.h | 215 |
1 files changed, 127 insertions, 88 deletions
diff --git a/gcc/ira-int.h b/gcc/ira-int.h index 1da087cecdb..8c5377065a6 100644 --- a/gcc/ira-int.h +++ b/gcc/ira-int.h @@ -564,9 +564,6 @@ extern int ira_overall_cost; extern int ira_reg_cost, ira_mem_cost; extern int ira_load_cost, ira_store_cost, ira_shuffle_cost; extern int ira_move_loops_num, ira_additional_jumps_num; - -/* Maximal value of element of array ira_reg_class_nregs. */ -extern int ira_max_nregs; /* This page contains a bitset implementation called 'min/max sets' used to record conflicts in IRA. @@ -717,98 +714,140 @@ minmax_set_iter_next (minmax_set_iterator *i) minmax_set_iter_cond (&(ITER), &(N)); \ minmax_set_iter_next (&(ITER))) -/* ira.c: */ +struct target_ira_int { + /* Hard registers that can not be used for the register allocator for + all functions of the current compilation unit. */ + HARD_REG_SET x_no_unit_alloc_regs; + + /* Map: hard regs X modes -> set of hard registers for storing value + of given mode starting with given hard register. */ + HARD_REG_SET (x_ira_reg_mode_hard_regset + [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]); + + /* Array based on TARGET_REGISTER_MOVE_COST. Don't use + ira_register_move_cost directly. Use function of + ira_get_may_move_cost instead. */ + move_table *x_ira_register_move_cost[MAX_MACHINE_MODE]; + + /* Similar to may_move_in_cost but it is calculated in IRA instead of + regclass. Another difference we take only available hard registers + into account to figure out that one register class is a subset of + the another one. Don't use it directly. Use function of + ira_get_may_move_cost instead. */ + move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE]; + + /* Similar to may_move_out_cost but it is calculated in IRA instead of + regclass. Another difference we take only available hard registers + into account to figure out that one register class is a subset of + the another one. Don't use it directly. Use function of + ira_get_may_move_cost instead. */ + move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE]; + + /* Register class subset relation: TRUE if the first class is a subset + of the second one considering only hard registers available for the + allocation. */ + int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES]; + + /* Array of the number of hard registers of given class which are + available for allocation. The order is defined by the the hard + register numbers. */ + short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; + + /* Index (in ira_class_hard_regs; for given register class and hard + register (in general case a hard register can belong to several + register classes;. The index is negative for hard registers + unavailable for the allocation. */ + short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; + + /* Array whose values are hard regset of hard registers available for + the allocation of given register class whose HARD_REGNO_MODE_OK + values for given mode are zero. */ + HARD_REG_SET x_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES]; + + /* The value is number of elements in the subsequent array. */ + int x_ira_important_classes_num; + + /* The array containing non-empty classes (including non-empty cover + classes; which are subclasses of cover classes. Such classes is + important for calculation of the hard register usage costs. */ + enum reg_class x_ira_important_classes[N_REG_CLASSES]; + + /* The biggest important class inside of intersection of the two + classes (that is calculated taking only hard registers available + for allocation into account;. If the both classes contain no hard + registers available for allocation, the value is calculated with + taking all hard-registers including fixed ones into account. */ + enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES]; + + /* True if the two classes (that is calculated taking only hard + registers available for allocation into account; are + intersected. */ + bool x_ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES]; + + /* Classes with end marker LIM_REG_CLASSES which are intersected with + given class (the first index;. That includes given class itself. + This is calculated taking only hard registers available for + allocation into account. */ + enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES]; + + /* The biggest important class inside of union of the two classes + (that is calculated taking only hard registers available for + allocation into account;. If the both classes contain no hard + registers available for allocation, the value is calculated with + taking all hard-registers including fixed ones into account. In + other words, the value is the corresponding reg_class_subunion + value. */ + enum reg_class x_ira_reg_class_union[N_REG_CLASSES][N_REG_CLASSES]; + + /* For each reg class, table listing all the classes contained in it + (excluding the class itself. Non-allocatable registers are + excluded from the consideration;. */ + enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]; +}; + +extern struct target_ira_int default_target_ira_int; +#if SWITCHABLE_TARGET +extern struct target_ira_int *this_target_ira_int; +#else +#define this_target_ira_int (&default_target_ira_int) +#endif -/* Map: hard regs X modes -> set of hard registers for storing value - of given mode starting with given hard register. */ -extern HARD_REG_SET ira_reg_mode_hard_regset - [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]; - -/* Array based on TARGET_REGISTER_MOVE_COST. Don't use - ira_register_move_cost directly. Use function of - ira_get_may_move_cost instead. */ -extern move_table *ira_register_move_cost[MAX_MACHINE_MODE]; - -/* Similar to may_move_in_cost but it is calculated in IRA instead of - regclass. Another difference we take only available hard registers - into account to figure out that one register class is a subset of - the another one. Don't use it directly. Use function of - ira_get_may_move_cost instead. */ -extern move_table *ira_may_move_in_cost[MAX_MACHINE_MODE]; - -/* Similar to may_move_out_cost but it is calculated in IRA instead of - regclass. Another difference we take only available hard registers - into account to figure out that one register class is a subset of - the another one. Don't use it directly. Use function of - ira_get_may_move_cost instead. */ -extern move_table *ira_may_move_out_cost[MAX_MACHINE_MODE]; - -/* Register class subset relation: TRUE if the first class is a subset - of the second one considering only hard registers available for the - allocation. */ -extern int ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES]; - -/* Array of the number of hard registers of given class which are - available for allocation. The order is defined by the the hard - register numbers. */ -extern short ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; - -/* Index (in ira_class_hard_regs) for given register class and hard - register (in general case a hard register can belong to several - register classes). The index is negative for hard registers - unavailable for the allocation. */ -extern short ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; - -/* Array whose values are hard regset of hard registers available for - the allocation of given register class whose HARD_REGNO_MODE_OK - values for given mode are zero. */ -extern HARD_REG_SET prohibited_class_mode_regs - [N_REG_CLASSES][NUM_MACHINE_MODES]; +#define ira_reg_mode_hard_regset \ + (this_target_ira_int->x_ira_reg_mode_hard_regset) +#define ira_register_move_cost \ + (this_target_ira_int->x_ira_register_move_cost) +#define ira_may_move_in_cost \ + (this_target_ira_int->x_ira_may_move_in_cost) +#define ira_may_move_out_cost \ + (this_target_ira_int->x_ira_may_move_out_cost) +#define ira_class_subset_p \ + (this_target_ira_int->x_ira_class_subset_p) +#define ira_non_ordered_class_hard_regs \ + (this_target_ira_int->x_ira_non_ordered_class_hard_regs) +#define ira_class_hard_reg_index \ + (this_target_ira_int->x_ira_class_hard_reg_index) +#define prohibited_class_mode_regs \ + (this_target_ira_int->x_prohibited_class_mode_regs) +#define ira_important_classes_num \ + (this_target_ira_int->x_ira_important_classes_num) +#define ira_important_classes \ + (this_target_ira_int->x_ira_important_classes) +#define ira_reg_class_intersect \ + (this_target_ira_int->x_ira_reg_class_intersect) +#define ira_reg_classes_intersect_p \ + (this_target_ira_int->x_ira_reg_classes_intersect_p) +#define ira_reg_class_super_classes \ + (this_target_ira_int->x_ira_reg_class_super_classes) +#define ira_reg_class_union \ + (this_target_ira_int->x_ira_reg_class_union) + +/* ira.c: */ /* Array whose values are hard regset of hard registers for which move of the hard register in given mode into itself is prohibited. */ extern HARD_REG_SET ira_prohibited_mode_move_regs[NUM_MACHINE_MODES]; -/* The value is number of elements in the subsequent array. */ -extern int ira_important_classes_num; - -/* The array containing non-empty classes (including non-empty cover - classes) which are subclasses of cover classes. Such classes is - important for calculation of the hard register usage costs. */ -extern enum reg_class ira_important_classes[N_REG_CLASSES]; - -/* The array containing indexes of important classes in the previous - array. The array elements are defined only for important - classes. */ -extern int ira_important_class_nums[N_REG_CLASSES]; - -/* The biggest important class inside of intersection of the two - classes (that is calculated taking only hard registers available - for allocation into account). If the both classes contain no hard - registers available for allocation, the value is calculated with - taking all hard-registers including fixed ones into account. */ -extern enum reg_class ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES]; - -/* True if the two classes (that is calculated taking only hard - registers available for allocation into account) are - intersected. */ -extern bool ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES]; - -/* Classes with end marker LIM_REG_CLASSES which are intersected with - given class (the first index). That includes given class itself. - This is calculated taking only hard registers available for - allocation into account. */ -extern enum reg_class ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES]; -/* The biggest important class inside of union of the two classes - (that is calculated taking only hard registers available for - allocation into account). If the both classes contain no hard - registers available for allocation, the value is calculated with - taking all hard-registers including fixed ones into account. In - other words, the value is the corresponding reg_class_subunion - value. */ -extern enum reg_class ira_reg_class_union[N_REG_CLASSES][N_REG_CLASSES]; - extern void *ira_allocate (size_t); extern void *ira_reallocate (void *, size_t); extern void ira_free (void *addr); |